Serial FFT OFDM Receiver De-interleaver Latency Reduction

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

In serial FFT/IFFT based OFDM/OFDMA systems, latency and memory usage are increased due to the need for reordering bits after serial FFT processing, which generates output in digit reversed order.

Innovation Solution

Processing data bits in reverse bit order instead of performing bit reordering after the serial FFT, and employing an additional de-interleaving permutation to return data bits to their original order.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If bit reordering is performed after serial FFT processing, then data integrity is maintained, but latency and memory usage increase

Engineering Contradiction:

Improvedata integrityVSAvoidlatency

Core Design Contradiction:

ReliabilityVSLoss of time

Solution Approach 1:

The patent inverts the conventional approach by performing bit reordering before the serial FFT operation rather than after. The receiver processes received signals through bit reordering first, then applies FFT, which eliminates the need for a second reordering operation and reduces overall latency while maintaining data integrity through the mathematical properties of the FFT operation

Inventive Principle:

Principle #13The other way round (Inversion)

2Reliability

If bit reordering is performed after serial FFT processing, then data integrity is maintained, but memory usage increases

Engineering Contradiction:

Improvedata integrityVSAvoidmemory usage

Core Design Contradiction:

ReliabilityVSQuantity of substance

Solution Approach 1:

By inverting the processing sequence to perform bit reordering before FFT, the patent eliminates the need for storing intermediate reordered results after FFT processing. This reduces memory requirements by avoiding the buffer storage that would be needed to hold data during the post-FFT reordering operation

Inventive Principle:

Principle #13The other way round (Inversion)

Solution Approach 2:

The patent performs bit reordering as a preliminary action before the FFT operation. This preliminary reordering prepares the data in the correct sequence for FFT processing, eliminating the need for subsequent reordering operations and the associated memory buffers that would be required to store intermediate results

Inventive Principle:

Principle #10Preliminary action

3Reliability

If conventional bit reordering operations are performed, then data is returned to original order, but processing complexity increases

Engineering Contradiction:

Improvedata orderingVSAvoidprocessing complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent inverts the conventional processing sequence by performing bit reordering before FFT rather than after. This inversion reduces processing complexity by eliminating redundant reordering operations and simplifying the overall signal processing pipeline, while still achieving the goal of returning data to its original order through the mathematical properties of the inverted operation sequence

Inventive Principle:

Principle #13The other way round (Inversion)

Data Source

PatentUS12289190B2System and method to reduce latency in serial FFT based OFDM receiver systems with de-interleaver

Publication Date: 2025.04.29 INFINEON TECHNOLOGIES AMERICAS CORP

AI summary

One or more devices, systems, and/or methods are provided. In an example of the techniques presented herein, a receiver has a receiver front end configured to receive time domain data in natural order, a fast Fourier transform module configured to generate frequency domain data in digit reversed order based on the time domain data, a demodulator configured to generate first demodulated data in digit reversed order based on the frequency domain data, and a de-interleaver configured to perform a reordering permutation on the first demodulated data to generate second demodulated data in natural order.