FFT Processor Architecture Using Vector and Matrix Operation Units
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Solution Overview
Problem
Existing methods for performing Fast Fourier Transform (FFT) using scalar and vector operation units are inefficient.
Innovation Solution
Implementing FFT calculations using a processor with both a vector operation unit and a matrix operation unit, where rotation factor calculation is performed by the vector unit and DFT calculation is performed by the matrix unit, optimizing the decomposition of FFT into stages and utilizing complex vector and matrix multiplications.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If FFT calculation is implemented using only scalar operation unit or vector operation unit, then device complexity is reduced, but productivity is insufficient
Solution Approach 1:
The FFT calculation is segmented into distinct functional components: rotation factor calculation handled by the vector operation unit and DFT calculation handled by the matrix operation unit. This segmentation allows each unit to specialize in its optimal operation type, improving overall calculation efficiency while maintaining manageable device complexity through functional decomposition.
Solution Approach 2:
The processor is designed with multi-functionality by integrating both vector operation unit and matrix operation unit within a single processor architecture. This allows the processor to handle different types of mathematical operations (vector operations for rotation factors and matrix operations for DFT) using dedicated hardware units, thereby improving FFT calculation efficiency without requiring multiple separate devices.
2Productivity
If rotation factor calculation and DFT calculation are performed using the same operation unit, then device complexity is reduced, but productivity is limited
Solution Approach 1:
Different parts of the processor are assigned different operational qualities: the vector operation unit is optimized for rotation factor calculation involving complex vector multiplications, while the matrix operation unit is optimized for DFT calculation involving matrix operations. This local specialization of quality allows each unit to operate at peak efficiency for its designated function, improving overall calculation efficiency.
Data Source
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AI summary
Embodiments disclosed in this application pertain to the field of computing technologies, and in particular, to a method for performing FFT, a processor, and a computing device. The method includes: A processor responds to an execution request of fast Fourier transform FFT calculation of an application, and decomposes the FFT calculation into a plurality of calculation stages. The processor sequentially executes the plurality of calculation stages, where when a target calculation stage is executed, a vector operation unit performs rotation factor calculation, and a matrix operation unit performs DFT calculation. After the execution of the plurality of calculation stages is completed, the processor determines an execution result of the FFT calculation based on an execution result of a last calculation stage, and returns the execution result to the application. According to this application, the processor may jointly implement the FFT calculation based on the vector operation unit and the matrix operation unit, so that efficiency of performing the FFT calculation by the processor can be improved.