Fixed-Point FFT Scaling Dissemination for Bit Width Control
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Solution Overview
Problem
Existing methods for fixed-point FFT in VLSI implementation face challenges with dynamic range growth, leading to resource waste and accuracy loss due to bit width increases or right shifts, and existing scaling methods are inefficient in managing quantization and saturation errors.
Innovation Solution
A method for disseminating scaling information through a linear decomposable transformation process and its inverse, allowing for separate execution in time or space, with a scaling decision-making module and multiplexer to optimize bit width and energy consumption by determining necessary scaling operations based on saturation and quantization errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If bit width is increased by one bit after each stage to prevent overflow, then dynamic range growth is managed, but hardware resources are wasted due to excessive bit width
Solution Approach 1:
The patent implements dynamic scaling where the bit width is adjusted adaptively at each stage based on actual data characteristics rather than using a fixed conservative approach. The scaling factor is determined by analyzing the dynamic range of input data and adjusting the bit width accordingly, allowing the system to use minimal bit width when data range is small while preventing overflow when needed.
Solution Approach 2:
The patent changes the parameter of bit width dynamically based on the actual data characteristics at each processing stage. Instead of maintaining a fixed large bit width to prevent overflow, the system adjusts the bit width parameter according to the measured dynamic range, achieving overflow prevention with minimal resource usage.
2Device complexity
If all data are shifted to the right by one bit at each stage to reduce bit width, then resource consumption is reduced, but accuracy is lost due to quantization errors
Solution Approach 1:
The system dynamically determines the scaling factor at each stage based on the actual dynamic range of the data, rather than applying a fixed right shift. This allows the bit width to be reduced only when the data characteristics permit, maintaining accuracy when the dynamic range is large while still achieving resource savings when the range is small.
Solution Approach 2:
The patent changes the bit width parameter adaptively based on measured data characteristics. The system monitors the dynamic range and adjusts the bit width parameter accordingly, reducing it only when safe to do so, thereby minimizing resource consumption without sacrificing necessary calculation accuracy.
3Measurement precision
If block floating point number method is used to determine scaling at each stage, then accuracy is improved and unnecessary truncation is avoided, but hardware cost increases due to data dependency management
Solution Approach 1:
The patent extracts only the essential scaling information needed for bit width optimization, separating this function from the complex block floating point management. By focusing specifically on determining appropriate bit width at each stage without implementing the full block floating point mechanism, the system achieves accuracy improvement with reduced hardware overhead.
Solution Approach 2:
The system adjusts the bit width parameter at each stage based on measured data characteristics, achieving adaptive scaling similar to block floating point methods but with simplified implementation. This parameter change approach improves output signal quality by avoiding unnecessary truncation while maintaining lower hardware complexity.
4Loss of time
If parsing-based solutions are used for scaling, then design time is reduced, but bit width is overly conservative and cannot fully consider data characteristics
Solution Approach 1:
The patent performs preliminary analysis of data characteristics during the design phase to establish initial scaling parameters, but then implements runtime adaptation based on actual input data. This preliminary action reduces design time compared to fully adaptive methods while still allowing the system to adjust to actual data characteristics during operation, avoiding overly conservative bit width allocation.
Data Source
AI summary
Example embodiments relate to methods for disseminating scaling information and applications thereof in very large scale integration (VLSI) implementations of fixed-point fast Fourier transforms (FFTs). One embodiment includes a method for disseminating scaling information in a system. The system includes a linear decomposable transformation process and an inverse process of the linear decomposable transformation process. The inverse process of the linear decomposable transformation process is defined, in time or space, as an inverse linear decomposable transformation process. The linear decomposable transformation process is separated from the inverse linear decomposable transformation process. The linear decomposable transformation process or the inverse linear decomposable transformation process is able to be performed first and is defined as a linear decomposable transformation I. The other remaining process is performed subsequently and is defined as a linear decomposable transformation II. The method for disseminating scaling information is used for a bit width-optimized and energy-saving hardware implementation.