Fiber-Reinforced Semiconductor Package for Warpage Control
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Solution Overview
Problem
Warpage of semiconductor packages occurs due to differences in thermal expansion coefficients between dissimilar materials used in the package components.
Innovation Solution
A semiconductor package design that includes a lower redistribution structure, a semiconductor chip, an interconnection structure with a fiber layer and insulating resin, and an encapsulant, which helps to control warpage and improve yield by incorporating a frame structure with recess portions that prevent burrs during the sawing process.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a fiber layer is added to reinforce the semiconductor package structure, then warpage control is improved, but manufacturing complexity increases due to the need for recess portions and burr prevention
Solution Approach 1:
The interconnection structure is segmented into distinct regions: a body portion and corner portions with recesses. This segmentation allows the fiber layer to be selectively positioned and trimmed at corners, providing warpage control in the main structure while preventing burr formation at vulnerable corner areas during sawing operations.
Solution Approach 2:
Recess portions are formed at the corner surfaces of the interconnection structure before the final sawing operation. This preliminary action creates a geometry that prevents burr formation during subsequent cutting, eliminating the need for post-processing burr removal and simplifying manufacturing.
2Productivity
If corner surfaces are trimmed to prevent burrs, then manufacturing yield is improved, but production time increases due to additional trimming steps
Solution Approach 1:
The recess portions are formed at corner surfaces before the sawing operation, creating a self-contained geometry that prevents burr formation during cutting. This preliminary geometric modification eliminates the need for subsequent burr trimming steps, maintaining high manufacturing yield without adding production time.
Solution Approach 2:
The potential harm of burr formation during sawing is converted into a benefit by designing recess portions that guide the saw blade and prevent burr creation in the first place. The corner geometry is intentionally modified to turn a manufacturing defect into a feature that eliminates the need for additional finishing operations.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The proposed design effectively reduces warpage and improves the yield of semiconductor packages by utilizing a fiber-reinforced interconnection structure and recessed corner surfaces that prevent burrs during manufacturing.
Implementation Method 1
Warpage of the semiconductor package may occur due to a difference in thermal expansion coefficients between dissimilar materials
Data Source
AI summary
A semiconductor package includes a lower redistribution structure including a lower redistribution layer; an interconnection structure disposed on the lower redistribution structure, having internal side surfaces defining a through-portion, external side surfaces, and corner surfaces defining recess portions between adjacent external side surfaces, and including a fiber layer having first fiber ends adjacent to at least a portion of the corner surfaces, an insulating resin layer in which the fiber layer is embedded, and an interconnection layer disposed on at least one surface of the insulating resin layer and electrically connected to the lower redistribution layer; a semiconductor chip disposed in the through-portion of the interconnection structure and including connection pads electrically connected to the lower redistribution layer; an encapsulant disposed in the through-portion and the recess portions of the interconnection structure; an upper redistribution structure disposed on the encapsulant and including an upper redistribution layer electrically connected to the lower redistribution layer; and connection bumps disposed below the lower redistribution structure and electrically connected to the lower redistribution layer.