Fiber-less Organic Substrate for IC Packaging
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Solution Overview
Problem
Existing integrated circuit packaging technologies face challenges in reducing package size, cost, and manufacturing time due to the use of substrates, which increase thickness and complexity, failing to meet demands for smaller, faster, and more reliable devices.
Innovation Solution
A fiber-less organic substrate system is developed, featuring a multi-dielectric layer structure with customizable metal layers for signal routing and thermal management, eliminating the need for additional substrate materials and allowing for independent sizing of metal layers for each electrical trace.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a substrate is used for connecting integrated circuit chips, then the connection and support function is achieved, but the package size increases and manufacturing complexity increases
Solution Approach 1:
The patent removes the traditional substrate from the packaging system entirely. Instead of using a separate substrate board to carry the chips, the chips are directly mounted on the support carrier with interconnect vias formed in the carrier. This extraction of the substrate eliminates the additional thickness and complexity while maintaining all necessary connection functions through the carrier's integrated structure.
Solution Approach 2:
The patent merges the substrate function with the support carrier. The support carrier is designed to perform both the mechanical support function and the electrical interconnection function that were previously separated between carrier and substrate. By integrating these functions into a single component, the overall package size is reduced while maintaining reliability.
2Reliability
If a substrate is used for mounting integrated circuit chips, then the mounting function is achieved, but the manufacturing cycle time increases and cost increases
Solution Approach 1:
The patent eliminates the substrate step from the manufacturing process. Without a separate substrate, the manufacturing cycle is simplified to depositing dielectric layers, forming interconnect vias directly in the carrier, and mounting chips. This reduces the number of manufacturing steps and cycle time while maintaining mounting reliability through the integrated carrier structure.
3Strength
If additional substrate material is used, then the structural support is improved, but the package thickness increases and cost increases
Solution Approach 1:
The patent removes the additional substrate material that would increase thickness. The support carrier is designed to provide all necessary structural support without requiring a separate substrate layer. The carrier's inherent strength and the integrated dielectric/interconnect structure provide sufficient mechanical support while minimizing thickness.
4Ease of manufacture
If existing manufacturing processes are reused, then the manufacturing cost is reduced, but the package size is not reduced
Solution Approach 1:
The patent changes the structural parameters of the packaging system by eliminating the substrate layer and integrating all functions into the support carrier. This parameter change (removing a layer) reduces package size while the manufacturing processes themselves remain largely the same (depositing dielectric layers, forming vias, mounting chips), thus maintaining ease of manufacture and low cost.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach results in a thin, reliable, and cost-effective integrated circuit packaging system that addresses size, performance, and thermal needs, enabling the combination of various integrated circuit chips without voltage or heat management issues.
Implementation Method 1
depositing a first dielectric layer on the metal barrier
Implementation Method 2
plating an interconnect via on the first metal layer and the second dielectric layer
Data Source
AI summary
An integrated circuit packaging system including: a fiber-less organic substrate including: a first dielectric layer, a first metal layer on the first dielectric layer, a second dielectric layer on the first dielectric layer and the first metal layer, and an interconnect via plated on the first metal layer and the second dielectric layer; an integrated circuit mounted over the second dielectric layer; and an integrated circuit interconnect between the integrated circuit and the interconnect via.