Stateless Fibre Channel Sequence Offload for Ethernet

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Solution Overview

Problem

Existing Fibre Channel over Ethernet (FCoE) network adapters are inefficient due to excessive CPU usage and complex hardware modifications required for handling Fibre Channel traffic, leading to performance degradation in storage networks.

Innovation Solution

The implementation of a Fibre Channel Sequence Offload Interface and corresponding Sequence Offload Modules in the hardware of Converged Network Adapters (CNAs) to perform stateless offloads, allowing for the transmission and reception of Fibre Channel sequences with reduced CPU workload and eliminating unnecessary data copying steps.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If existing NICs are used as FCoE CNAs with individualized frame processing, then basic FCoE functionality is achieved, but performance degradation occurs due to excessive CPU usage and multiple data copies

Engineering Contradiction:
ImproveI/O operation efficiencyVSAvoidhardware complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent segments the FCoE processing functionality into separate modular components: a state machine module that handles protocol state management, a sequence offload module that processes frame sequences, and a buffer management module that handles data buffering. This segmentation allows each module to be optimized independently and reduces the overall processing burden on the CPU while maintaining full FCoE functionality.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces an intermediary buffer structure that sits between the network interface and the upper layer protocols. This intermediary buffer acts as a mediator that decouples the frame reception from the protocol processing, allowing frames to be pre-processed and staged in the buffer before being handed off to the CPU, thereby reducing CPU intervention and improving I/O efficiency.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Productivity

If complete I/O offload is implemented in Fibre Channel HBAs, then CPU burden is reduced, but hardware complexity and cost increase due to complex state-full logic requirements

Engineering Contradiction:
ImproveCPU cycle reductionVSAvoidhardware complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent extracts the complex state-full logic from the HBA hardware and relocates it to software-based state machine modules that run on the CPU. This extraction allows the hardware to remain simple while still achieving I/O offload functionality. The state machine modules handle protocol state management in software, eliminating the need for complex hardware state machines while maintaining full protocol compliance.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent implements self-service mechanisms where the sequence offload module automatically manages frame sequencing, buffering, and protocol compliance without requiring complex hardware assistance. The system uses software-based protocols and state machines that can adapt to different FCoE scenarios, providing flexible I/O offload functionality without the need for expensive, complex hardware modifications.

Inventive Principle:
Principle #25Self-service

3Productivity

If standard NIC driver interface buffers are used for incoming frames, then basic frame reception works, but performance degrades due to decapsulation and copying steps

Engineering Contradiction:
Improvedata transfer speedVSAvoidprocessing time
Core Design Contradiction:
ProductivityVSLoss of time

Solution Approach 1:

The patent performs preliminary actions by pre-processing incoming frames in the intermediary buffer before they reach the upper layer protocols. Frame decapsulation, validation, and sequencing are performed in advance during the buffering stage, so that when frames are handed off to the CPU or upper layers, they are already prepared and ready for immediate processing. This eliminates the need for repeated decapsulation and copying operations, significantly improving data transfer speed and reducing processing time.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS9049218B2Stateless fibre channel sequence acceleration for fibre channel traffic over Ethernet
Publication Date: 2015.06.02 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US9049218B2 patent drawing
  • US9049218B2 patent drawing
  • US9049218B2 patent drawing

AI summary

A method for offloading Fiber Channel transmit data in an I/O operation. The transmit data includes Fiber Channel sequences, each Fiber Channel sequence includes multiple frames. The method includes generating a single transmit sequence request descriptor for transmitting all of the plurality of frames; creating an Ethernet header, a FCoE encapsulation header, and a Fiber Channel header for each frame in response to information in the transmit sequence request descriptor; creating start of frame and end of frame delimiters; inserting data into each frame; computing Fiber Channel CRC and Ethernet FCS for each frame; and transmitting the plurality of frames over a network. In each of the plurality of frames, the Ethernet header precedes the FCoE encapsulation header, which precedes the Fiber Channel header, which precedes the data. The data is followed by the Fiber Channel CRC, which is followed by the Ethernet FCS.