Field Bus Addressing for High Speed Serial Systems
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
High speed serial bus systems are not addressable, limiting the expansion and efficiency of control systems in applications like automatic control, aviation, and unmanned aerial vehicles, as they lack the ability to uniquely identify and communicate with components.
Innovation Solution
Implementing a method and device for bus addressing using a field bus to allocate unique communication addresses to components, establishing correlations between physical and communication addresses, and optionally index numbers, enabling efficient information exchange and system expansion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If high speed serial bus is used for control systems, then system performance and cost are improved, but system expandability deteriorates due to lack of addressability
Solution Approach 1:
The patent transforms the non-addressable high speed serial bus into an addressable system by introducing address parameters (communication addresses, index numbers) that can be dynamically assigned to components. This parameter change enables the bus to identify and communicate with specific components, thereby improving system expandability while maintaining high performance
Solution Approach 2:
The patent introduces an intermediary addressing mechanism that mediates between the controller and components on the bus. This intermediary layer ( consisting of address allocation units, address registers, and mapping mechanisms) enables the controller to uniquely identify and communicate with individual components, resolving the addressability limitation of the original bus system
2Ease of manufacture
If high speed serial bus is used for control systems, then system cost is reduced, but communication efficiency deteriorates due to lack of unique component identification
Solution Approach 1:
By introducing address parameters and communication protocols, the system enables efficient targeted communication without requiring expensive hardware modifications. The address allocation mechanism allows the controller to directly address specific components, improving communication efficiency while maintaining cost-effectiveness
Solution Approach 2:
The addressing mechanism serves multiple functions: it enables component identification, facilitates targeted communication, supports system expansion, and provides maintenance capabilities. This multi-functional approach improves communication efficiency without requiring separate systems for each function, thereby maintaining cost-effectiveness
3Measurement precision
If addressing mechanism is added to high speed serial bus, then component identification capability is improved, but system complexity increases
Solution Approach 1:
The patent segments the addressing function into distinct components: address allocation unit, address register, mapping mechanism, and communication protocol layer. This segmentation allows each component to handle a specific aspect of addressing, improving identification capability while managing system complexity through functional decomposition
Solution Approach 2:
The system implements self-service addressing where components can be automatically assigned addresses by the controller without manual configuration. The address allocation unit automatically manages address assignment and the mapping mechanism automatically translates between physical and communication addresses, reducing complexity while maintaining precise identification capability
Data Source
AI summary
A method for bus addressing includes a controller receiving handshaking information from a component of a control system, allocating a communication address to the component through a field bus, and establishing a correlation between a physical address of the component and the communication address.