Field Bus Transceiver Slew-Rate Switching for CAN Arbitration

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Solution Overview

Problem

Field bus systems, such as CAN, face signal integrity issues due to improper termination of bus nodes, leading to reflections and increased loop delay, which can cause collisions during arbitration and degrade signal quality, especially at higher data rates.

Innovation Solution

A transceiver circuit with a slew-rate controller, output stage, and monitoring circuit that adjusts the slew rate based on the phase of the data frame, setting a higher slew rate during arbitration and reducing it during data transmission to maintain signal integrity across both terminated and non-terminated bus nodes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of time

If a high slew rate is used during data transmission, then loop delay is reduced and arbitration is improved, but signal integrity deteriorates due to reflections at non-terminated bus nodes

Engineering Contradiction:
Improveloop delayVSAvoidsignal integrity
Core Design Contradiction:
Loss of timeVSReliability

Solution Approach 1:

The patent applies dynamics by making the slew rate adjustable and phase-dependent. The slew rate is set to a first value during the arbitration phase to minimize loop delay and ensure synchronized signal arrival, and to a second (lower) value during the data transmission phase to reduce reflections and maintain signal integrity. This dynamic adjustment resolves the contradiction between minimizing delay and maintaining signal quality.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent changes the slew rate parameter based on the communication phase. By monitoring the phase of the data frame (arbitration vs. transmission), the system adjusts the slew rate parameter to optimize performance for each phase: higher during arbitration for timing synchronization, lower during transmission for signal integrity.

Inventive Principle:
Principle #35Parameter changes

2Reliability

If a low slew rate is used during data transmission, then signal integrity is improved, but loop delay increases which may cause arbitration issues

Engineering Contradiction:
Improvesignal integrityVSAvoidloop delay
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system dynamically adjusts the slew rate based on the communication phase rather than using a fixed low value. During arbitration, the slew rate is increased to ensure timely signal propagation, while during data transmission, it is reduced to maintain signal integrity. This resolves the contradiction by applying the appropriate slew rate at the appropriate time.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The monitoring circuit prepares the slew rate setting in advance based on the detected phase of the data frame. Before the data transmission phase begins, the system has already switched to the appropriate slew rate value, ensuring that signal integrity is maintained from the start of transmission without causing arbitration delays.

Inventive Principle:
Principle #10Preliminary action

3Reliability

If temporary terminations are used in bus nodes, then signal integrity is improved, but device complexity increases and they may overwrite error frames

Engineering Contradiction:
Improvesignal integrityVSAvoidtransceiver circuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

Instead of adding physical termination circuits, the patent changes the electrical parameter (slew rate) of the existing transceiver output stage. This software-controlled parameter adjustment achieves signal integrity improvement without adding hardware complexity or risking error frame overwriting, as it modifies the driving characteristics rather than adding switching termination elements.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS11444802B2Field bus system with a switchable slew rate
Publication Date: 2022.09.13 INFINEON TECHNOLOGIES AG
  • US11444802B2 patent drawing
  • US11444802B2 patent drawing
  • US11444802B2 patent drawing

AI summary

A circuit has a driver circuit with a slew-rate controller, an output stage and a monitoring circuit. The output stage is connected to a first bus line and to a second bus line, and the driver circuit is designed to control the output stage on the basis of a first logic signal in such a manner that a corresponding bus voltage is produced between the first bus line and the second bus line. The slew-rate controller is coupled to the driver circuit and is designed to set a slew rate of the driver circuit on the basis of an input signal. The monitoring circuit is designed to generate the input signal for the slew-rate controller, wherein the input signal indicates a higher slew rate during an arbitration phase of a data frame contained in the first logic signal than during a data transmission phase of the data frame.