Field-Effect Transistors with Fin-Shaped Insulating Layers for Leakage Control
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Solution Overview
Problem
Existing semiconductor devices face challenges in scaling density while maintaining electrical stability and reducing capacitance, particularly in multi-gate transistors with fin- or nanowire-shaped channels, where leakage currents and short channel effects are prevalent.
Innovation Solution
The semiconductor device incorporates a fin-shaped insulating layer and field insulating layer with specific configurations to block leakage currents, including trench structures and overlapping insulating layers to manage source/drain regions and gate electrodes, enhancing electrical connectivity and reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If multi-gate transistor with fin-shaped channel is used to increase device density, then scaling capability is improved, but leakage current increases
Solution Approach 1:
The device is divided into multiple gates (first gate electrode and second gate electrode) that wrap around the fin-shaped channel from opposite directions. This segmentation allows independent control of leakage current on each side of the channel, enabling better suppression of short channel effects while maintaining high device density through the multi-gate configuration.
2Reliability
If gate length is increased to improve current control capability, then current control is improved, but device area increases
Solution Approach 1:
The invention transitions from a planar gate configuration to a three-dimensional multi-gate structure where gates wrap around the fin channel from multiple directions. This dimensional change allows the gates to control current flow through the channel from opposite sides, achieving superior current control capability without requiring an increase in gate length, thus maintaining compact device area.
3Productivity
If pitch size is decreased to increase device density, then device density is improved, but capacitance between contacts increases
Solution Approach 1:
Field insulating layers are introduced as intermediary structures between adjacent fin-shaped channels and between the gate electrodes and source/drain regions. These field insulating layers act as mediators that electrically isolate neighboring structures, reducing parasitic capacitance between contacts and enabling closer pitch spacing while maintaining low capacitance for high-speed operation.
4Object-generated harmful factors
If field insulating layer is added to block leakage current, then leakage current is reduced, but device complexity increases
Solution Approach 1:
The field insulating layers serve multiple functions simultaneously: they block leakage current between adjacent fins, provide electrical isolation between gate electrodes and source/drain regions, and act as spacers during fabrication processes. This multi-functionality reduces the need for additional separate structures, thereby limiting the increase in device complexity while achieving effective leakage current suppression.
Data Source
AI summary
The present disclosure provides a semiconductor device with improved element performance and reliability. The semiconductor device includes a lower insulating layer, a fin-shaped insulating layer that is on the lower insulating layer and extends in a first direction, a field insulating layer that is on the lower insulating layer and extends in the first direction, a plurality of gate structures that are on the fin-shaped insulating layer and include a gate electrode intersecting the fin-shaped insulating layer, a source/drain region that is on the fin-shaped insulating layer and is between the gate structures, and an active pattern that is on the fin-shaped insulating layer and penetrates the gate electrode and is electrically connected to the source/drain region, where the gate electrode extends in a second direction intersecting the first direction.


