Field Electrode Metallization Layout for Switching Overshoot Control
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Solution Overview
Problem
Existing semiconductor devices with field electrodes in trenches face challenges in managing electrical resistance, particularly during switching events, leading to voltage overshoots due to direct connections between metallization layers above the field electrode trench.
Innovation Solution
Implementing a metallization structure with a lower and upper metallization layer separated by an insulating layer, where the electrical connection between these layers is made with a lateral offset from the field electrode trench, increasing the conductor line length and resistance, thereby reducing voltage overshoots.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the metallization layers are directly connected above the field electrode trench, then the electrical connection is short and resistance is low, but voltage overshoots occur during switching events
Solution Approach 1:
The patent transitions from a direct vertical connection (one-dimensional path) to an offset connection that extends laterally (adding a second dimension). The first interconnect is positioned at a lateral offset from the field electrode trench, creating a longer conduction path that increases resistance and reduces voltage overshoots during switching events.
Solution Approach 2:
The patent changes the geometric parameters of the electrical connection path by introducing a lateral offset. This increases the conductor line length and electrical resistance between the metallization layers, which directly addresses the voltage overshoot issue by modifying the electrical characteristics of the connection.
2Reliability
If the conductor line length is increased to increase resistance, then voltage overshoots are reduced, but the device area increases
Solution Approach 1:
The patent applies local quality by introducing the lateral offset only in the specific region where the first interconnect connects to the upper metallization layer. The offset is localized to this critical connection point rather than extending throughout the entire device, thereby increasing resistance where needed while minimizing the overall area impact.
Data Source
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AI summary
The present application relates to a semiconductor device (1), comprising a field electrode (11) in a needle-shaped field electrode trench (12) extending from a frontside of a semiconductor body (10) into the semiconductor body (10), a lower metallization layer (20) on the frontside of the semiconductor body (10), electrically connected to the field electrode (11), an insulating layer (30) on the lower metallization layer (20), an upper metallization layer (40) on the insulating layer (30), a first interconnect (105.1) electrically connecting the lower metallization layer (20) to the upper metallization layer (40), wherein the first interconnect (105.1) is laterally offset to the field electrode trench (12), the lower metallization layer (20) being not connected to the upper metallization layer (40) in a region (15) vertically above the field electrode trench (12).