Field Emission Rectifier Nanostructuring for High Current Density
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Solution Overview
Problem
High-speed rectification technologies, such as rectennas, face challenges in large area fabrication due to short device spatial scales and high current requirements, particularly in printing-based processes.
Innovation Solution
A method of forming an electronic field emission rectifier with a first metal layer, a patterned dielectric layer, and a second metal layer, where the dielectric and second metal layers are patterned to create edges that are at least 50% longer than the peripheral edge of the first metal layer, enhancing electric field emission and current density through nanostructuring and printing technologies.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If traditional rectifier fabrication methods are used, then manufacturing simplicity is maintained, but device spatial scale becomes too large for practical applications
Solution Approach 1:
The patent transitions from planar rectifier designs to vertically stacked three-dimensional architectures, enabling compact spatial footprint while maintaining functional performance. The stacked configuration allows current to flow through multiple layers (anode, dielectric, cathode) in the vertical dimension, achieving high current density in a small planar area.
Solution Approach 2:
The patent incorporates porous dielectric layers with controlled pore structures that enable ion transport while maintaining electrical insulation. The porous architecture increases surface area and facilitates current pathways through the dielectric, allowing compact device design without compromising current conduction capability.
2Productivity
If edge length is increased to improve current density, then rectification efficiency improves, but device area increases
Solution Approach 1:
The patent resolves this contradiction by moving the edge length extension into the vertical dimension through stacked architectures. Multiple rectangular or square layers stacked vertically provide cumulative edge length for current collection without increasing the planar footprint, as each layer contributes additional perimeter length for current extraction.
Solution Approach 2:
The patent employs nested or interdigitated electrode configurations where electrodes are arranged in concentric or overlapping patterns. This nesting approach maximizes the effective edge length within a compact planar area, allowing current collection from multiple edges simultaneously without proportionally increasing device area.
3Ease of manufacture
If printing-based fabrication is used, then manufacturing cost decreases, but precision of short spatial features deteriorates
Solution Approach 1:
The patent employs parameter changes in the printing process, including optimizing ink viscosity, deposition speed, and drying conditions, to achieve precise feature dimensions. By adjusting these process parameters, the patent enables printing-based fabrication to produce sub-micrometer features with controlled precision suitable for rectifier applications.
Solution Approach 2:
The patent uses preliminary patterning steps where coarse features are printed first, followed by subsequent refinement steps. This multi-stage printing approach allows preliminary deposition of metal and dielectric layers with relaxed precision requirements, followed by more precise patterning of critical features, thereby reducing overall manufacturing difficulty while maintaining feature precision.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables the fabrication of spatially small, inexpensive, high current rectifiers suitable for various applications, including microwave antenna arrays, by increasing the total length of edges in the rectifying region, thereby improving current density and efficiency.
Implementation Method 1
The nanostructuring layer self-assembles into removable regions embedded within a matrix. When the removable regions are removed, a pattern is formed in the matrix.
Implementation Method 2
A variety of applications employ high-speed rectification. One such application involves rectifying microwave antenna arrays. Rectifying antennas, or 'rectennas,' comprise a rectifier coupled to an antenna. The antenna produces AC current in response to an electromagnetic signal and the rectifier converts the AC current produced by the antenna to DC current.
Data Source
AI summary
A method of forming an electronic field emission rectifier involves depositing a first metal layer, a dielectric, and a second metal layer on a substrate in that order. The dielectric layer and the second metal layer are patterned. Patterning the dielectric and second metal layers involves depositing a nanostructuring layer on the second metal layer. The nanostructuring layer self-assembles into removable regions embedded within a matrix. When the removable regions are removed, a pattern is formed in the matrix.