Field-by-Field Overlay Control Using Partial Wafer Sampling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Current wafer processing systems rely on complex and costly advanced process control (APC) methods that require infrequent updates of field-by-field correction paths, limiting their ability to provide real-time corrections for process signatures and mechanical/optical drifts.
Innovation Solution
An integrated run-to-run, field-by-field control path that determines CPE correctables on a lot-by-lot basis using a mixture of measured and estimated parameters, allowing for partial wafer sample plans and enabling more frequent updates through a system combining metrology tools and computing systems for real-time adjustments.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a full wafer sample plan is used for field-by-field CPE control, then measurement precision is improved, but loss of time increases due to infrequent updates
Solution Approach 1:
The patent applies partial action by using a partial wafer sample plan instead of measuring all fields. It selects a subset of fields for measurement and uses estimation for remaining fields, thereby reducing measurement time while maintaining sufficient precision for run-to-run control updates
Solution Approach 2:
The patent introduces an intermediary estimation process that fills in unmeasured fields based on measured data from selected fields. This intermediary step allows the system to generate complete field-by-field correctables without requiring complete wafer measurement, enabling faster updates
2Reliability
If three separate control paths (run-to-run, field-by-field, scanner baseline) are maintained, then reliability of process control is improved, but device complexity increases
Solution Approach 1:
The patent merges the run-to-run control path with field-by-field CPE control into a single integrated control path. This integration maintains the reliability benefits of both control mechanisms while reducing the overall system complexity by eliminating the need for separate control loops and their associated infrastructure
Solution Approach 2:
The integrated control path serves multiple functions simultaneously: it performs run-to-run control updates and field-by-field CPE updates through a single unified system. This multi-functionality reduces the need for specialized separate control paths while maintaining comprehensive process control capability
3Loss of time
If infrequent CPE updates are performed, then loss of time is reduced, but manufacturing precision deteriorates due to inability to correct process signatures and drifts in real-time
Solution Approach 1:
The patent uses partial wafer measurement combined with estimation to enable frequent run-to-run updates without requiring complete wafer measurement each time. This partial action approach provides sufficient precision for frequent updates while maintaining manufacturing precision through the estimation of unmeasured fields
Solution Approach 2:
The integrated control path implements continuous feedback loops that use measured and estimated field parameters to generate correctables for both run-to-run and field-by-field control. This feedback mechanism enables real-time correction of process signatures and mechanical/optical drifts while maintaining precision through iterative refinement
Data Source
AI summary
The present disclosure is directed to a method of determining at least one correctable for a process tool. In an embodiment, the method includes the steps of: measuring one or more parameter values at one or more measurement locations of each field of a selection of measured fields of a wafer; estimating one or more parameter values for one or more locations of each field of a selection of unmeasured fields of the wafer; and determining at least one correctable for a process tool based upon the one or more parameter values measured at the one or more measurement locations of each field of the selection of measured fields of the wafer and the one or more parameter values estimated for the one or more locations of each field of the selection of unmeasured fields of the wafer.