Field Oxide Segmentation for Semiconductor Device Leakage Prevention

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Solution Overview

Problem

Conventional methods for manufacturing semiconductor devices with high and low withstand voltage MOS transistors on the same substrate result in a step formation in the field oxide, leading to defects such as printing issues, etching residuals, and inter-field leakage, which hinder normal device operation.

Innovation Solution

The method involves forming field oxides encircling active regions with a separating region in between, using a semiconductor layer as the boundary between high and low withstand voltage transistor regions, and employing selective etching to prevent step formation in the field oxide, thereby ensuring proper insulation and reducing leakage.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If field oxides are formed encircling active regions with boundary positioned on the field oxide, then high withstand voltage MOS transistor region and low withstand voltage MOS transistor region are electrically separated, but a step is formed in the upper part of the field oxide leading to printing defects and inter-field leakage

Engineering Contradiction:
Improveelectrical separation between high and low withstand voltage regionsVSAvoidstep formation in field oxide causing printing defects
Core Design Contradiction:
ReliabilityVSManufacturing precision

Solution Approach 1:

The invention divides the field oxide structure into two distinct parts: a first field oxide encircling the high withstand voltage MOS transistor region and a second field oxide encircling the low withstand voltage MOS transistor region. These field oxides are separated by a semiconductor layer, eliminating the step formation problem that occurs when a single continuous field oxide structure is used. This segmentation allows each field oxide to be independently formed and positioned, preventing the boundary positioning issue on a continuous field oxide surface.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The semiconductor layer acts as an intermediary element positioned between the first and second field oxides. This intermediate layer serves multiple functions: it physically separates the two field oxide regions, prevents direct contact that would cause step formation, and provides a platform for positioning the boundary between high and low withstand voltage regions without creating printing defects or inter-field leakage.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If field oxides are formed encircling active regions with boundary positioned on the field oxide, then electrical separation is achieved, but inter-field leakage occurs hindering normal device operation

Engineering Contradiction:
Improveelectrical separation between regionsVSAvoidinter-field leakage
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

By segmenting the field oxide structure into separate first and second field oxides divided by a semiconductor layer, the invention eliminates the continuous field oxide path that causes inter-field leakage. The semiconductor layer acts as an electrical barrier between the two field oxide regions, preventing leakage currents while maintaining the necessary electrical separation for device operation.

Inventive Principle:
Principle #1Segmentation

3Adaptability or versatility

If conventional manufacturing method is used with boundary on field oxide, then high and low withstand voltage MOS transistors are formed on same substrate, but step formation causes etching residuals and printing issues

Engineering Contradiction:
Improveintegration of high and low withstand voltage MOS transistors on same substrateVSAvoidprinting defects and etching residuals due to step formation
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The invention segments the field oxide structure into separate first and second field oxides with a semiconductor layer between them, eliminating the step formation that occurs with conventional continuous field oxide structures. This segmentation allows for precise control of each field oxide region, enabling accurate printing and etching processes without the interference of step-induced defects, while maintaining the ability to integrate both high and low withstand voltage MOS transistors on the same substrate.

Inventive Principle:
Principle #1Segmentation

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach prevents step formation in the field oxide, reduces defects like open, short, and leakage, and enhances the reliability of semiconductor devices by ensuring accurate gate electrode formation and minimizing inter-field leakage.

Implementation Method 1

exposing the second predetermined region by etching the first insulation film using the resist pattern as a mask

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS7432163B2Method of manufacturing semiconductor device that includes forming adjacent field regions with a separating region therebetween
Publication Date: 2008.10.07 LAPIS SEMICON CO LTD
  • US7432163B2 patent drawing
  • US7432163B2 patent drawing
  • US7432163B2 patent drawing

AI summary

A method of manufacturing a semiconductor device comprises the steps of: preparing a semiconductor substrate, the semiconductor substrate having first and second predetermined regions; forming a first field region surrounding the first predetermined region; forming a second field region surrounding the second predetermined region while a separating region exists between adjacent first and second field regions; forming a first insulation film on the semiconductor substrate; forming a resist pattern on the first insulation film, the resist pattern covering the first predetermined region and a part of the separating region; exposing the second predetermined region by etching the first insulation film using the resist pattern as a mask; forming a second insulation film on the second predetermined region; and forming gate electrodes on the first and second insulation films.