Field Oxide Taper Transition for Lateral Power Semiconductor Reliability

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Solution Overview

Problem

Lateral power semiconductor devices face a trade-off between device performance (low drain-to-source on resistance and high breakdown voltage) and reliability (hot carrier stress-induced degradation and breakdown), necessitating optimization of electrical field distribution through the geometrical shape of the field oxide.

Innovation Solution

A method involving the formation of a first oxide layer on a semiconductor wafer with a thickness of 400 nm or less, altering the etch rate of a second layer to create a field oxide with a thickness transition region having a taper of less than 45 degrees relative to the semiconductor substrate, and etching using an isotropic etchant to improve electrical field distribution.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the field oxide has a steep taper (approximately 45 degrees), then the device performance is improved with lower manufacturing complexity, but the reliability deteriorates due to hot carrier stress-induced degradation and breakdown

Engineering Contradiction:
Improvedevice reliabilityVSAvoidfield oxide geometry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The field oxide structure is segmented into multiple regions with different taper angles: a first thickness transition region with a first taper angle range and a second thickness transition region with a second taper angle range. This segmentation allows different portions of the field oxide to serve different functions - one region optimizes for reliability while another maintains manufacturability

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

Different regions of the field oxide are given different local geometric properties (different taper angles) to optimize specific functions in each region. The first thickness transition region has a shallower taper to reduce peak electric field and improve reliability, while the second thickness transition region has a steeper taper to maintain manufacturing efficiency

Inventive Principle:
Principle #3Local quality

2Reliability

If the field oxide geometry is optimized for high device performance, then the electrical field distribution improves, but the reliability deteriorates due to electric field spikes within the device

Engineering Contradiction:
Improvedevice reliabilityVSAvoidfield oxide fabrication ease
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The field oxide is divided into multiple thickness transition regions with different taper characteristics. The first thickness transition region uses a shallower taper angle to reduce peak electric field strength and eliminate field spikes, while the second thickness transition region uses a steeper taper angle that is easier to manufacture using conventional processes

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The taper angle parameter is varied across different regions of the field oxide. By changing the taper angle from shallow in the first thickness transition region to steeper in the second thickness transition region, the patent optimizes both electrical field distribution and manufacturing feasibility

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The solution enhances device performance by reducing peak electric field strength, improving breakdown voltage, and increasing device stability while maintaining reliability by minimizing hot carrier-induced degradation.

Implementation Method 1

etching the second layer and the first oxide layer through an opening in a mask using an isotropic etchant

Methodology Applied
Scientific EffectEtching:

Data Source

PatentUS20260020316A1Semiconductor Die Having a Field Oxide Thickness Transition Region and Method of Producing the Semiconductor Die
Publication Date: 2026.01.15 INFINEON TECH DRESDEN GMBH & CO KG
  • US20260020316A1 patent drawing
  • US20260020316A1 patent drawing
  • US20260020316A1 patent drawing

AI summary

A method includes: forming a first oxide layer having a thickness of 400 nm or less on a first main surface of a semiconductor wafer; forming a second layer on the first oxide layer; altering an etch rate of at least a first part of the second layer such that a horizontal component (r1) of the etch rate is greater than a vertical component (r2) of an etch rate of the first oxide layer; etching the oxide layers through an opening in a mask using an isotropic etchant, wherein due to the difference between r1 and r2, a first thickness transition region of the first oxide layer under the mask is etched with a taper of less than 45 degrees relative to the first main surface; after the etching, removing the second layer and then forming a gate oxide adjacent to the first thickness transition region.