Field-Plate Transistor Structure With Switchable Charge Storage
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Solution Overview
Problem
The challenge is to enhance the electrical performance of transistor devices as they shrink in size, requiring improved electrical characteristics such as breakdown voltage and on-current.
Innovation Solution
A transistor structure is designed with a substrate, gate structure, doped regions, drift region, field plate, charge storage layer, and dielectric layers, where the charge storage layer is strategically positioned between the field plate and drift region, allowing for potential switching between higher breakdown voltage and higher on-current modes by altering its charge state.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of moving object
If the transistor device size is reduced to meet shrinking electronic device requirements, then the device can be miniaturized, but the electrical performance (breakdown voltage and on-current) deteriorates
Solution Approach 1:
The charge storage layer is embedded within the existing transistor structure, specifically positioned between the field plate and the drift region. This nested configuration allows the charge storage functionality to be integrated without increasing the overall device footprint, thereby maintaining miniaturization while improving electrical performance through controlled charge storage and release mechanisms
Solution Approach 2:
The patent utilizes program and erase operations to dynamically change the electrical parameters of the charge storage layer, switching between negative and positive potential states. This parameter change capability allows the transistor to achieve higher breakdown voltage in one state and higher on-current in another state, effectively improving electrical performance without increasing device size
2Reliability
If the breakdown voltage is increased to improve electrical performance, then the transistor can handle higher voltages, but the on-current performance deteriorates
Solution Approach 1:
The charge storage layer is designed to be dynamically controllable through program and erase operations, allowing it to switch between negative and positive potential states. This dynamic特性 enables the transistor to adapt its electrical characteristics in real-time, achieving high breakdown voltage when needed and high on-current when needed, rather than being fixed in one state
Solution Approach 2:
By changing the electrical parameters of the charge storage layer through program/erase operations, the patent achieves a trade-off resolution: negative potential state provides higher breakdown voltage while positive potential state provides higher on-current. This parameter switching capability allows optimization of electrical performance based on operational requirements
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enhances the transistor's electrical performance by increasing breakdown voltage and on-current, enabling switching between modes to optimize device operation.
Implementation Method 1
a charge storage layer, which can be switched between negative and positive potential states to enhance breakdown voltage and on-current, respectively, by program and erase operations
Implementation Method 2
The field plate is located on the substrate above the drift region
Data Source
AI summary
A transistor structure including a substrate, a gate structure, a first doped region, a second doped region, a drift region, a field plate, a charge storage layer, and a first dielectric layer is provided. The gate structure is located on the substrate. The first doped region and the second doped region are located in the substrate on two sides of the gate structure. The drift region is located in the substrate between the gate structure and the second doped region. The field plate is located on the substrate above the drift region. The charge storage layer is located between the field plate and the drift region. The first dielectric layer is located between the field plate and the charge storage layer.