Field Plate Dielectric Layout for High-Breakdown Semiconductor Gates
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Solution Overview
Problem
Existing power semiconductor devices face challenges in achieving high breakdown voltages, high electron mobility, and good thermal stability, which are crucial for applications in wireless communications and electric vehicles.
Innovation Solution
A semiconductor structure is designed with a specific configuration of dielectric layers and a field plate, including a first dielectric layer with multiple portions, an etch stop layer, and a field plate with varying distances from the semiconductor layer, which redistributes the electric field to enhance breakdown voltage and adjust charge distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Strength
If conventional semiconductor structures are used, then manufacturing is simpler, but breakdown voltage is insufficient
Solution Approach 1:
The field plate is divided into multiple portions (first field plate portion, second field plate portion, third field plate portion) positioned at different heights and locations. This segmentation allows each portion to contribute differently to electric field distribution, achieving high breakdown voltage through coordinated action of multiple segmented elements rather than a single uniform structure.
Solution Approach 2:
The patent introduces vertical dimensionality by positioning field plate portions at different heights above the semiconductor layer (first distance, second distance, third distance). This multi-level vertical arrangement creates a three-dimensional electric field distribution that enhances breakdown voltage while maintaining controlled device complexity through systematic spatial organization.
2Reliability
If uniform field plate configuration is used, then manufacturing is easier, but electric field distribution is suboptimal
Solution Approach 1:
Different portions of the field plate are positioned at different locations and heights (first field plate portion at first distance, second field plate portion at second distance, third field plate portion at third distance) to create locally optimized electric field distribution. Each region receives tailored field control appropriate to its specific functional requirements, improving overall reliability while maintaining manufacturability through a systematic multi-layer approach.
3Speed
If field plate is positioned close to semiconductor layer, then electron mobility improves, but breakdown voltage decreases
Solution Approach 1:
The field plate is segmented into multiple portions at different distances from the semiconductor layer. The second field plate portion positioned at the second distance (closer to semiconductor layer) enhances electron mobility in the channel region, while the first and third field plate portions at greater distances (first distance and third distance) provide breakdown voltage enhancement, achieving both objectives through coordinated segmented action.
Solution Approach 2:
By utilizing the vertical dimension to position field plate portions at multiple different distances from the semiconductor layer, the patent simultaneously achieves close proximity effects (improved electron mobility) and distant field control (enhanced breakdown voltage). This vertical stratification resolves the contradiction by operating at multiple distance levels concurrently.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The structure achieves high breakdown voltage, high electron mobility, and good thermal stability, suitable for high-power semiconductor components and transistors, with improved process efficiency and reduced current leakage.
Implementation Method 1
a field plate with varying distances from the semiconductor layer, which redistributes the electric field to enhance breakdown voltage and adjust charge distribution
Data Source
AI summary
A semiconductor structure includes a gate structure on a semiconductor layer on a substrate, a first dielectric layer continuously extending on the gate structure and the semiconductor layer and including a first portion and a second portion, a second dielectric layer on an etch stop layer on at least the first portion of the first dielectric layer, and a field plate including a first field-plate portion on the second dielectric layer and a second field-plate portion on the second portion of the first dielectric layer. Lower surfaces of the first field-plate portion and the second field-plate portion are respectively distanced from the semiconductor layer with a first distance and a second distance that is smaller than the second distance. The field plate and the gate structure respectively have a first projection and a second projection that is not overlapped with the first projection on the substrate.