Field Plate Isolation Structure for Compact High-Voltage Transistors
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Solution Overview
Problem
High voltage transistor devices face issues with electric field accumulation at the edge of the field plate, leading to substrate damage and reduced performance due to increased resistance and reduced charge carrier transfer, especially when the lateral distance of the drift region is minimized to accommodate more devices on a single substrate.
Innovation Solution
Incorporating a buried isolation structure within the drift region, separated from the field plate by an etch stop layer, to mitigate electric field accumulation and prevent substrate damage, while maintaining reduced lateral distance for increased device density.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the lateral distance of the drift region is minimized to accommodate more devices on a single substrate, then device density increases, but electric field accumulation occurs at the field plate edge leading to substrate damage and increased resistance
Solution Approach 1:
An isolation structure is introduced as an intermediary element positioned between the field plate and the drift region. This isolation structure acts as a mediator that prevents direct interaction between the high electric field at the field plate edge and the substrate, thereby preventing substrate damage while allowing minimal lateral distance for high device density.
Solution Approach 2:
The drift region is segmented by introducing the isolation structure that divides it into multiple regions. This segmentation allows the electric field to be contained and managed in specific zones, preventing uncontrolled field accumulation at the field plate edge while maintaining the overall compact structure for high device density.
2Productivity
If the lateral distance of the drift region is minimized, then device density increases, but resistance increases and charge carrier transfer efficiency decreases
Solution Approach 1:
The isolation structure serves as a mediator that manages the electric field distribution in the drift region. By preventing field accumulation at the field plate edge, it maintains more uniform electric field conditions that facilitate efficient charge carrier transfer even when the drift region lateral distance is minimized for high device density.
Solution Approach 2:
The isolation structure changes the electric field distribution parameters in the drift region by preventing field accumulation. This parameter change ensures that the electric field remains within optimal ranges for charge carrier transport, maintaining transfer efficiency despite the reduced lateral distance required for high device density.
3Productivity
If the lateral distance of the drift region is minimized, then device density increases, but breakdown voltage decreases
Solution Approach 1:
The isolation structure acts as a mediator that prevents electric field accumulation at the field plate edge, which is a critical location for breakdown. By blocking the harmful field concentration, the isolation structure maintains higher breakdown voltage even when the drift region lateral distance is minimized to achieve high device density.
Solution Approach 2:
The isolation structure provides beforehand cushioning by preventing electric field accumulation before it can reach damaging levels. This preventive measure protects the substrate and maintains breakdown voltage integrity in the compact high-density device structure where the drift region lateral distance is minimized.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The buried isolation structure enhances the breakdown voltage and reduces resistance, improving the stability, endurance, and performance of high voltage transistor devices by preventing electric field-induced damage and maintaining efficient charge carrier transfer.
Implementation Method 1
separated from the field plate by an etch stop layer
Implementation Method 2
Incorporating a buried isolation structure within the drift region, separated from the field plate by an etch stop layer, to mitigate electric field accumulation
Data Source
AI summary
Various embodiments of the present disclosure are directed towards an integrated chip. The integrated chip includes a first source/drain region and a second source/drain region in a substrate and laterally offset from one another. A gate electrode overlies the substrate and is between the first and second source/drain regions. A first field plate structure overlies the substrate and is between the gate electrode and the first source/drain region. An isolation structure is in the substrate and between the gate electrode and the first source/drain region. A first distance between the isolation structure and the gate electrode is greater than a second distance between opposing sidewalls of the first field plate structure.