Gateway Linking Time-Sensitive Fieldbuses Across Different Time Domains

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Solution Overview

Problem

Existing time-sensitive fieldbuses often lack compatibility, requiring reconfiguration when new components are added, and current solutions for networking them assume uniform time understanding, leading to inefficiencies and economic challenges in upgrading existing systems.

Innovation Solution

A gateway that mediates communication between fieldbuses by synchronizing their clock frequencies, allowing them to operate with different time domains without aligning time slots, enabling seamless data exchange of both time-sensitive and non-time-sensitive data.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If fieldbuses are networked assuming uniform time understanding, then time synchronization is simplified, but compatibility between different fieldbus types is lost and reconfiguration is required

Engineering Contradiction:
Improvecompatibility between different fieldbus typesVSAvoidtime domain coordination complexity
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent introduces a gateway as an intermediary device that mediates communication between fieldbuses with different time domains. The gateway translates time references and coordinates communication between fieldbuses that would otherwise be incompatible, allowing them to exchange data without requiring uniform time understanding or reconfiguration of existing fieldbus systems.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Stability of the object's composition

If clock frequencies are synchronized between fieldbuses, then time offset stability is maintained, but existing fieldbus processes may be disrupted

Engineering Contradiction:
Improvetime offset stabilityVSAvoidexisting fieldbus process reliability
Core Design Contradiction:
Stability of the object's compositionVSReliability

Solution Approach 1:

The patent performs preliminary synchronization of clock frequencies between fieldbuses before actual data exchange operations. By pre-establishing synchronized time references and configuring the gateway with appropriate time domain parameters, the system ensures time offset stability is maintained without disrupting existing fieldbus processes during operation.

Inventive Principle:
Principle #10Preliminary action

3Productivity

If time slots are aligned between fieldbuses, then real-time data transmission is optimized, but flexibility in operating with different cycle times is lost

Engineering Contradiction:
Improvereal-time data transmission efficiencyVSAvoidflexibility in cycle time configuration
Core Design Contradiction:
ProductivityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic time slot management where the gateway adapts time slot allocations based on the specific cycle times and time domain characteristics of connected fieldbuses. Rather than enforcing fixed alignment, the system dynamically adjusts translation parameters and coordination mechanisms to optimize real-time data transmission while maintaining flexibility in operating with different cycle times.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentEP4062597B1Method, system, and gateway for linking time-sensitive fieldbuses
Publication Date: 2025.05.21 WAGO VERW GMBH
  • EP4062597B1 patent drawingFigure 1
  • EP4062597B1 patent drawingFigure 2
  • EP4062597B1 patent drawingFigure 3

AI summary

The invention relates to a method for linking a first time-sensitive fieldbus (10) to a second time-sensitive fieldbus (20). The first time-sensitive fieldbus (10) has a first subscriber device (14a) and a first dedicated time domain (16), and the second time-sensitive fieldbus (20) has a second subscriber device (22) and a second dedicated time domain (26), said first time domain (16) and second time domain (26) being frequency-synchronized. The first and second fieldbus (10, 20) are connected together by means of a gateway (30). The method has the following steps: storing a first subscriber device identifier (ID14'a) in the memory unit of the gateway (30), said first subscriber device identifier (ID14'a) identifying a virtual image (14'a) of the assigned first subscriber device (14a) of the first fieldbus (10); storing a second subscriber device identifier (ID22') in the memory unit of the gateway (30), said second subscriber device identifier (ID22') identifying a virtual image 22' of the assigned second subscriber device (22) of the second fieldbus (20); determining a first cycle duration TC1 of the first fieldbus (10) and a second cycle duration TC2 of the second fieldbus (20) by means of the gateway (30) at a reference time TRef; and determining a delay (58) between the first time domain (16) and the second time domain (26) by means of the gateway (30) at the reference time TRef. The invention additionally relates to a corresponding system (1) and a corresponding gateway (30).