Shared FIFO Buffer for Multi-Endpoint Data Integrity

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Solution Overview

Problem

Existing communication architectures using chip-select for data transfers between hosts and multiple endpoints face challenges in ensuring data integrity while maintaining a small footprint and simple user interfaces, particularly due to limitations in FIFO buffer management and sequencing mechanisms.

Innovation Solution

Implementing a common FIFO buffer in each direction for all endpoints, with independent read and write pointers, status flags, and optional thresholds, allowing for efficient data transfer and management without requiring additional buffer area or complex sequencing mechanisms.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dedicated FIFO buffers are used for each endpoint, then data integrity for each endpoint is ensured, but additional buffer area is required

Engineering Contradiction:
Improvedata integrityVSAvoidbuffer area
Core Design Contradiction:
ReliabilityVSArea of stationary object

Solution Approach 1:

The patent merges multiple endpoint-specific FIFO buffers into a single shared FIFO buffer that serves all endpoints. The shared buffer uses tag fields to identify which endpoint each data location belongs to, allowing multiple endpoints to share the same physical buffer space while maintaining logical separation and data integrity for each endpoint.

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The shared FIFO buffer is designed to serve multiple endpoints simultaneously through a universal interface. Each buffer location contains a tag field that identifies the endpoint, enabling the same buffer infrastructure to handle data for different endpoints without requiring dedicated buffers for each one.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Area of stationary object

If a common FIFO buffer is used for all endpoints, then buffer area is reduced, but the host must implement complex sequencing mechanisms to manage transfers across endpoints

Engineering Contradiction:
Improvebuffer areaVSAvoidsequencing mechanism
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The patent segments the shared FIFO buffer into multiple logical regions, one for each endpoint, by using tag fields in each buffer location. Each endpoint has its own write pointer and read pointer that operate independently within the shared buffer, allowing simultaneous operations for different endpoints without complex sequencing.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system enables self-service operation where each endpoint independently manages its own data transfers using its own pointers and status flags. The host can initiate transfers for different endpoints concurrently, and the buffer management logic automatically handles the segregation and routing of data to the correct endpoints through tag matching.

Inventive Principle:
Principle #25Self-service

3Reliability

If the host tracks ongoing transactions to completion before starting the next transaction, then data integrity is maintained, but throughput is reduced

Engineering Contradiction:
Improvedata integrityVSAvoidthroughput
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The patent segments the buffer management into independent endpoint-specific pointer pairs (write and read pointers for each endpoint). This allows the host to initiate multiple transactions for different endpoints concurrently, with each endpoint's transaction progress tracked independently through its own pointers, eliminating the need to wait for one transaction to complete before starting the next.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The system enables continuous useful action by allowing the host to continuously initiate transfers for different endpoints without idle waiting periods. While one endpoint is being serviced, the host can simultaneously prepare and initiate transfers for other endpoints, maintaining continuous productive operation across the multi-endpoint system.

Inventive Principle:
Principle #20Continuity of useful action

Data Source

PatentUS11385862B2Data flow control for multi-chip select
Publication Date: 2022.07.12 TEXAS INSTRUMENTS INC
  • US11385862B2 patent drawing
  • US11385862B2 patent drawing
  • US11385862B2 patent drawing

AI summary

A system, method and computer readable medium for operating a First In, First Out (FIFO) buffer that transfers data between a host and a plurality of endpoints using chip select is disclosed. The method includes receiving a current value of a read pointer and a status for an active endpoint and reading data at a location to which the read pointer points and setting a tag associated with the location to which the read pointer points to indicate availability.