FIFO Buffer Signal Order Preservation Reducing Device Coupling
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
Existing signal order-preserving methods in communication and network chips lead to increased coupling between devices due to write confirmation delays, resulting in intermittent requests and unstable system performance.
Innovation Solution
The method involves writing invalid data into FIFO memories for upstream devices with no request signals in the same clock cycle, and discarding these invalid data while conveying the request signals from the corresponding FIFO memories to downstream devices, ensuring order preservation without relying on the processing state of other devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If write confirmation method is used for order-preserving, then data reading and writing correctness is ensured, but delay caused by write confirmation deepens buffering of subsequent request source and intensifies coupling extent between modules
Solution Approach 1:
The patent segments the buffering mechanism into multiple independent FIFO buffers, each handling specific request types (read requests, write requests, write confirmations). This segmentation allows independent processing of different signal types without requiring other modules to wait for write confirmations, thereby reducing coupling while maintaining order-preserving guarantees.
2Reliability
If write confirmation method is used for order-preserving, then data reading and writing correctness is ensured, but subsequent requests become intermittent and system performance becomes unstable
Solution Approach 1:
The patent implements preliminary action by pre-allocating multiple FIFO buffers and establishing the buffering framework before actual signal processing begins. This allows the system to handle requests in a structured manner from the outset, avoiding intermittent performance issues by ensuring that read and write requests can be buffered and processed independently without waiting for write confirmations.
3Reliability
If write confirmation method is used for order-preserving, then precedence relationship consistency is maintained, but delay caused by write confirmation increases processing time
Solution Approach 1:
The patent enables continuous processing of read requests and write requests through dedicated FIFO buffers that operate independently of write confirmation delays. While write confirmations are still processed to maintain precedence relationships, the useful actions of reading and writing can proceed continuously without being blocked by confirmation delays, thereby reducing overall processing time while maintaining reliability.
Data Source
AI summary
Embodiments of the present invention relate to a signal order-preserving method and apparatus. When data of a request signal that comes from a corresponding first upstream device is written into a first first input first output (FIFO) memory, invalid data is written into a second FIFO memory corresponding to a second upstream device in a same clock cycle; and the data of the request signal is read from the first FIFO memory, the invalid data is read from the second FIFO memory, the invalid data is discarded, and the data of the request signal is conveyed to a downstream device. Through the signal order-preserving method and apparatus in the embodiments of the present invention, the coupling extent between devices on which there is an order-preserving requirement is reduced while signal order-preserving is achieved.