FIFO Buffer Decouples Data Paths for Storage Control
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Solution Overview
Problem
Current systems for storing and retrieving large volumes of digital video, audio, and auxiliary data in receivers, such as hard disk drives, are inefficient due to the need for multiple register operations, making them unwieldy and difficult to manage, especially when data needs to be stored in real-time.
Innovation Solution
A receiver system with a 'first in first out' (FIFO) buffer that decouples instruction data and block data paths, allowing for automated bulk data transfer using generic register read/write commands, reducing the number of steps required for data storage and enabling efficient data transfer compatible with existing storage control systems.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If multiple individual register read and write functions are used to transfer data, then data transfer can be performed using existing storage control systems, but the control system becomes unwieldy and difficult to manage
Solution Approach 1:
The patent segments the data transfer process into two distinct paths: a control path for instruction data and a data path for block data. This segmentation allows the control system to handle bulk data transfers with simplified commands while maintaining compatibility with existing storage control systems through the separate control path.
Solution Approach 2:
The patent introduces a buffer as an intermediary component between the control system and the storage device. The buffer decouples the control operations from the actual data transfer, allowing the control system to issue simple bulk transfer commands while the buffer manages the detailed register operations, thereby reducing control system complexity.
2Reliability
If six-step protocol is used for each 128KB data transfer, then data integrity and control are maintained, but the number of steps required increases making the process inefficient
Solution Approach 1:
The patent performs preliminary actions by setting up the buffer and configuring the data path before bulk data transfer begins. The control path prepares all necessary control signals and buffer configurations in advance, allowing the actual data transfer to proceed with fewer iterative steps while maintaining data integrity through pre-configured control mechanisms.
Solution Approach 2:
The patent merges multiple individual register operations into a single bulk data transfer command. By combining the control path and data path operations into coordinated bulk transfers, the system reduces the number of protocol steps from six per 128KB to fewer steps for larger data volumes, improving efficiency while maintaining reliability through the dual-path architecture.
3Loss of time
If data is stored in real-time with changing requirements, then data freshness is maintained, but the control of storage becomes difficult
Solution Approach 1:
The patent implements dynamic control through the buffer, which can adapt to changing data storage requirements in real-time. The buffer dynamically manages data flow between the control path and data path, allowing the system to respond to changing storage needs without complicating the control interface, as the buffer absorbs the complexity of real-time adjustments.
Data Source
AI summary
Means which allows the storage and subsequent retrieval of data on a storage means such as, for example, a storage means in the form of, and known as, a hard disk drive. The storage of data is in the form of video, audio and/or auxiliary data transmitted from a remote location and received by receiver apparatus for the processing and subsequent generation of video, audio, and/or auxiliary data via a television screen connected to or including the receiver. In some instances the data is not decoded and displayed immediately, and the decoding and/or the display of the data, when it does occur may be obtained from the storage means. The control system of the storage means includes a First In First Out (FIFO) buffer which in conjunction with a Central Processing Unit (CPU) controls the generation of the control signals and the storage of the incoming data.