FIFO Circuit for Low Swing Data Bus Signal Recovery
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Solution Overview
Problem
In high-frequency memory systems, recovering limited swing signals to full swing voltage for processing is challenging, requiring additional power-consuming CMOS circuitry, which contradicts the power conservation goal of using limited swing buses.
Innovation Solution
A FIFO circuit with a simple n-type metal-oxide semiconductor transistor input is precharged to full swing voltage before data reception, automatically recovering limited swing signals to full swing, reducing power consumption while enabling data processing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If limited swing signaling is used on the data bus to reduce power consumption, then current consumption is reduced, but additional power-consuming CMOS circuitry is required to recover the limited swing to full swing voltage for processing
Solution Approach 1:
The FIFO circuit is precharged to full swing voltage before data reception, preparing the circuit in advance to automatically recover limited swing signals to full swing without requiring additional recovery circuitry during operation
Solution Approach 2:
The FIFO circuit automatically recovers limited swing signals to full swing voltage through its inherent precharge mechanism, eliminating the need for separate recovery circuitry and reducing overall system complexity
2Reliability
If additional CMOS circuitry is added to recover limited swing signals, then full swing processing is enabled, but power consumption increases
Solution Approach 1:
The signal recovery function is merged into the existing FIFO circuit structure, combining the precharge mechanism with the recovery function to eliminate separate recovery circuitry and reduce overall power consumption
Solution Approach 2:
The FIFO circuit performs multiple functions including data storage, signal recovery, and voltage level restoration using a single integrated structure, eliminating the need for dedicated recovery circuitry
Data Source
AI summary
Methods, systems, and devices for a data circuit for a low swing data bus are described. An apparatus may include a data bus that may transfer data at a first voltage different than a second voltage that is associated with one or more components of the memory array. A transistor, coupled with the data bus, may receive the second voltage and send a third voltage. A first in first out (FIFO), coupled with the transistor, may receive the third voltage from the transistor. The FIFO circuit may include one or more precharge components that drive an input voltage of the FIFO circuit to the second voltage associated with the one or more components of the memory array based on receiving the third voltage.