Shared FIFO Memory Credit Allocation for Multi-Threaded Processing

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Solution Overview

Problem

Conventional multi-threaded processing systems require separate FIFO memories for each thread, which inefficiently uses die area, whereas there is a need to use a shared FIFO memory while maintaining independent access for each thread.

Innovation Solution

A single FIFO memory is used to store data for multiple threads, where threads are assigned to classes with dedicated and shared entries, allowing dynamic allocation and independent execution of threads as if each had a dedicated FIFO memory.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Ease of operation

If separate FIFO memories are used for each processing thread, then independent access for each thread is ensured, but die area consumption increases

Engineering Contradiction:
Improveindependent accessVSAvoiddie area
Core Design Contradiction:
Ease of operationVSArea of stationary object

Solution Approach 1:

The single shared FIFO memory is segmented into class-specific regions through credit-based allocation. Each thread class is assigned a dedicated credit limit that defines its accessible portion of the shared FIFO, creating logical segmentation without physical separation. This allows independent access control for each class while using shared physical memory resources.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

A single FIFO memory structure serves multiple thread classes simultaneously, making the memory universal. The same physical FIFO storage is shared across different thread classes, with access controlled by class-specific credit counters. This multi-functional approach eliminates the need for separate dedicated FIFOs for each thread while maintaining independent access semantics.

Inventive Principle:
Principle #6Universality (Multi-functionality)

2Area of stationary object

If a shared FIFO memory is used for multiple threads, then die area is conserved, but independent access control becomes complex

Engineering Contradiction:
Improvedie areaVSAvoidaccess control complexity
Core Design Contradiction:
Area of stationary objectVSDevice complexity

Solution Approach 1:

The system uses credit counters as dynamic parameters to control access to the shared FIFO. Each thread class has an associated credit limit parameter that defines its access entitlement. As threads produce or consume data, credits are incremented or decremented, dynamically adjusting available access without complex control logic. This parameter-based control simplifies the management of shared resources.

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

Credit counters serve as intermediary mechanisms between thread classes and the shared FIFO memory. Rather than implementing complex direct access control logic, the patent uses credits as an intermediate layer that mediates access requests. The credit comparison unit acts as a mediator that automatically grants or denies access based on credit availability, simplifying the overall control architecture.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If credits are strictly limited per class, then memory allocation control is precise, but data throughput may be restricted

Engineering Contradiction:
Improvememory allocation precisionVSAvoiddata throughput
Core Design Contradiction:
Manufacturing precisionVSProductivity

Solution Approach 1:

The credit allocation system is dynamic rather than static. Credit limits for each class can be adjusted based on runtime conditions, allowing the system to adapt to varying throughput requirements. When a class needs more bandwidth, its credit limit can be increased, and when it has excess capacity, credits can be reduced or reallocated to other classes. This dynamic adjustment maintains precise control while optimizing overall system throughput.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The system periodically evaluates and adjusts credit allocations based on the production and consumption rates of different thread classes. Credits are incremented when data is produced and decremented when data is consumed, creating a periodic rhythm of allocation and release. This periodic credit management ensures precise control over memory usage while allowing throughput to fluctuate according to actual data flow patterns.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS8429661B1Managing multi-threaded FIFO memory by determining whether issued credit count for dedicated class of threads is less than limit
Publication Date: 2013.04.23 NVIDIA CORP
  • US8429661B1 patent drawing
  • US8429661B1 patent drawing
  • US8429661B1 patent drawing

AI summary

Systems and methods storing data for multi-threaded processing permit multiple execution threads to store data in a single first-in first-out (FIFO) memory. Threads are assigned to classes, with each class including one or more threads. Each class may be allocated dedicated entries in the FIFO memory. A class may also be allocated shared entries in the FIFO memory. The shared entries may be used by any thread. Data for a first thread may be stored in the FIFO memory while data for a second thread is read from the FIFO memory, even when the first thread and the second thread are not in the same class. The FIFO memory is shared between the threads to conserve die area, however each thread may be executed independently, as if each thread has a dedicated FIFO memory.