FIFO Ring Buffer Video Processing Module Configuration

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Solution Overview

Problem

Existing video processing devices require multiple dedicated hardware modules for different codecs, consuming significant circuit area and resources, and face inefficiencies in information transfer between modules due to reliance on cache storage and addressable memory.

Innovation Solution

A video processing device employing a set of first-in first-out (FIFO) ring buffers to transfer information between video processing modules, allowing flexible configuration based on the codec, thereby reducing the need for cache storage and address calculations, and simplifying the processing order according to the codec requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If multiple dedicated hardware modules are used for different codecs, then the device can support multiple encoding and decoding formats, but the circuit area and resource consumption increase significantly

Engineering Contradiction:

Improvecodec supportVSAvoidcircuit area

Core Design Contradiction:

Adaptability or versatilityVSArea of stationary object

Solution Approach 1:

The patent implements a universal video processing architecture where a single set of video processing modules can handle multiple codecs through configurable control logic. The control module receives codec identification information and dynamically configures the processing modules to operate in different modes, allowing one hardware structure to perform multiple codec functions without requiring separate dedicated modules for each codec format

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system employs dynamic configuration where the control module adjusts the operation mode of video processing modules based on the detected codec type. The processing pipeline can be reconfigured on-the-fly to match the requirements of different codecs, enabling the same hardware to adapt its behavior dynamically rather than being fixed for a single codec

Inventive Principle:

Principle #15Dynamics

2Reliability

If cache storage and addressable memory are used for information transfer between modules, then data can be stored and retrieved, but processing overhead increases due to address calculations and cache management

Engineering Contradiction:

Improveinformation transferVSAvoidprocessing overhead

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts and removes the cache storage and addressable memory components from the information transfer path between video processing modules. Instead of using traditional memory with address calculation, the system employs direct point-to-point data transfer mechanisms that eliminate the need for intermediate storage and address management, thereby reducing processing overhead while maintaining reliable information transfer

Inventive Principle:

Principle #2Taking out (Extraction)

Solution Approach 2:

The control module acts as an intermediary that directly routes information between video processing modules based on codec requirements. Rather than using cache memory as an intermediary storage layer, the control module mediates the data flow by dynamically connecting producing and consuming modules, eliminating address calculation overhead while ensuring reliable data transfer

Inventive Principle:

Principle #24Intermediary (Mediator)

3Manufacturing precision

If dedicated hardware modules are used for each codec, then codec-specific processing can be performed, but the device complexity and resource utilization increase

Engineering Contradiction:

Improvecodec-specific processingVSAvoidmodule quantity

Core Design Contradiction:

Manufacturing precisionVSDevice complexity

Solution Approach 1:

Inventive Principle:

Principle #6Universality (Multi-functionality)

Solution Approach 2:

The system changes operational parameters of the video processing modules based on the detected codec type. By modifying control parameters, data flow configurations, and processing algorithms dynamically, the same hardware modules can achieve codec-specific processing precision without being physically dedicated to a single codec, thereby reducing overall device complexity

Inventive Principle:

Principle #35Parameter changes

Data Source

PatentUS8854382B2Multi-function encoder and decoder devices, and methods thereof

Publication Date: 2014.10.07 VIXS SYSTEMS INC

AI summary

A technique for encoding and decoding video information uses a plurality of video processing modules (VPMs), whereby each video processing module is dedicated to a particular video processing function, such as filtering, matrix arithmetic operations, and the like. Information is transferred between the video processing modules using a set of first-in first-out (FIFO) buffers. For example, to transfer pixel information from a first VPM to a second VPM, the first VPM stores the pixel information at the head of a FIFO buffer, while the second VPM retrieves information from the tail of the FIFO buffer. The FIFO buffer thus permits transfer of information between the VPMs without storage of the information to a cache or other techniques that can reduce video processing speed.