FIFO Sampling Rate Conversion for Clock Drift Stability
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Solution Overview
Problem
Existing sampling rate conversion techniques face challenges in achieving high accuracy and stability when converting between two clocks with different frequencies and sources, often resulting in underrun or overrun issues due to moderate changes in clock frequency, leading to unstable circuit operations and increased apparatus size.
Innovation Solution
A sampling rate conversion apparatus and method that utilizes a FIFO and a calculating unit to generate write and read control signals based on current and predicted clock frequencies, allowing for real-time measurement of frequency variations and cumulative errors, thereby stabilizing the predicted frequency and preventing buffer overflow or data dropout.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a feedback loop is used to control the correction unit from the margin detection unit to prevent underrun or overrun in the FIFO, then the reliability of preventing buffer overflow or data dropout is improved, but the circuit complexity increases and stable operation deteriorates
Solution Approach 1:
The patent extracts and eliminates the complex feedback loop control mechanism (margin detection unit J6, correction unit J5, correction data generating unit J4) from the conventional sampling rate conversion apparatus. Instead of using a feedback loop that monitors FIFO margin and adjusts correction data, the invention uses a direct calculation method where the fs conversion calculating unit J1 computes the frequency ratio R based on actual measured clock frequencies from the frequency detection unit J2, without requiring feedback control. This extraction of the feedback mechanism simplifies the circuit structure while maintaining reliability through direct frequency measurement and calculation.
2Manufacturing precision
If multiple control units (frequency detection unit, margin detection unit, correction unit) are provided to achieve accurate sampling rate conversion, then the manufacturing precision of frequency ratio calculation is improved, but the device complexity increases
Solution Approach 1:
The patent merges the functions of frequency detection, sampling rate conversion calculation, and FIFO control into a streamlined architecture. The frequency detection unitJ2 directly provides measured frequency data to the fs conversion calculating unitJ1, which then generates control signals for the FIFO without requiring separate margin detection or correction units. This merging of functions reduces the number of circuit blocks while maintaining calculation accuracy through direct use of measured frequency values.
Solution Approach 2:
The fs conversion calculating unitJ1 serves multiple functions: it calculates the frequency ratio R from measured clock frequencies, determines the sampling rate conversion parameters, and generates control signals for the FIFO operation. This multi-functionality eliminates the need for separate dedicated units for each task, reducing overall device complexity while maintaining precision through integrated calculation and control.
3Measurement precision
If the frequency detection unit measures the input clock frequency to calculate the frequency ratio, then the measurement precision of clock frequency is improved, but the reliability deteriorates due to accumulated error with moderate frequency changes
Solution Approach 1:
The patent implements dynamic frequency measurement and calculation where the frequency detection unitJ2 continuously monitors the input clock frequency, and the fs conversion calculating unitJ1 dynamically adjusts the frequency ratio R based on actual measured values. This dynamic approach allows the system to adapt to moderate frequency changes in real-time, preventing accumulated error by continuously updating the frequency ratio calculation rather than relying on fixed or previously calculated values. The dynamic recalculation ensures stability even when clock frequencies drift due to temperature or other environmental factors.
Data Source
AI summary
A sampling apparatus for converting first data, sampled at a first sampling rate, into second data, sampled at a second sampling rate. A FIFO storing the first data based on a write control signal and outputs the second data read out based on a read control signal indicating whether the second data is to be read out during the next time interval. The apparatus further includes a frequency detection unit for measuring the first clock signal during the current time interval to generate the value of the first current clock frequency, generating the value of a current predicted clock frequency from the value of the first current clock frequency and the value of the directly previously predicted clock frequency and for using the value of the current predicted clock frequency as the directly previously predicted clock frequency during the next time interval. A calculating unit generates the write control signal and read control signal from the value of a second current frequency, generated by measuring the second clock signal during the current time interval, to output the write and read control signal to the FIFO.