Parallel Figure-8 Inductor Topology for Lower VCO Phase Noise
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Solution Overview
Problem
Voltage-controlled oscillators (VCOs) in mobile communication devices generate phase noise, which affects the performance and quality of wireless signals, and existing inductor designs face a trade-off between reducing phase noise and maintaining a high quality factor due to the relationship between inductance and power consumption.
Innovation Solution
A parallel figure-8 inductor configuration is introduced, where two coils are placed in parallel, resulting in a total inductance approximately half of each coil's inductance, allowing for larger inductance and inner diameter, thus increasing the quality factor and reducing phase noise while maintaining flux cancellation.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the inductance is increased to reduce phase noise, then the quality factor increases, but the power consumption increases
Solution Approach 1:
The inductor is divided into two separate coils connected in parallel, each contributing to the overall inductance. This segmentation allows the design to achieve the desired total inductance value while maintaining lower power consumption compared to a single large inductor, as each coil operates more efficiently
Solution Approach 2:
The patent changes the topological configuration from series to parallel connection, which fundamentally alters the relationship between inductance, quality factor, and power consumption. The parallel configuration enables achieving high quality factor at reduced power consumption levels by distributing the current flow across two paths
2Use of energy by moving object
If the inductance is decreased to reduce power consumption, then the power consumption decreases, but the quality factor decreases and phase noise increases
Solution Approach 1:
By segmenting the inductor into two parallel coils, the system achieves an optimal balance where each coil can be designed with appropriate inductance value to maintain high quality factor while operating at lower power levels, avoiding the need for a single large inductor that would consume excessive power
3Quantity of substance
If a single large inductor is used to achieve high inductance, then the inductance is sufficient, but the area occupied increases and manufacturing complexity increases
Solution Approach 1:
The inductor is segmented into two coils connected in parallel, which can be arranged in a compact figure-8 or interleaved pattern. This segmentation enables achieving the required total inductance value while occupying significantly less chip area compared to a single large inductor, as the magnetic fields of the two coils can partially cancel or complement each other to enhance inductance density
Solution Approach 2:
The patent employs three-dimensional winding techniques or multi-layer configurations for the two coils, utilizing vertical stacking or interleaved layers to increase the effective inductance without proportionally increasing the planar footprint, thereby reducing the overall area occupied by the inductor
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The parallel figure-8 inductor configuration effectively reduces phase noise by increasing the quality factor and decreasing inductance, improving the efficiency of the VCO and signal quality in mobile communication devices.
Implementation Method 1
maintaining flux cancellation
Data Source
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Figure 5
AI summary
A voltage-controlled oscillator may include an inductor. The inductor may include a first coil coupled to an electronic component. The inductor may include a first coil coupled to the first circuit component, a second coil coupled to the first circuit component via a junction and being in parallel with the first coil, and a shared circuit path coupled to the second circuit component, the first coil, and the second coil, the shared circuit path overlapping the junction. The inductor may be configured to reduce phase noise generated by the electronic component.