Figure-8 Integrated Inductors With Low Mutual Inductance
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
There is a need for integrated devices and packages with smaller form factors while maintaining or improving performance, as existing inductors occupy significant space, limiting the miniaturization of these components.
Innovation Solution
The integration of a first and second inductor, each comprising a spiral configuration with specific origins and tails, is used to achieve minimal mutual inductance, allowing for high inductance with a smaller footprint by configuring them in a figure 8-shape or other arrangements, which can be implemented in the die interconnection or metallization portions of the device.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Area of stationary object
If traditional inductor configurations are used, then sufficient inductance is achieved, but the package size increases
Solution Approach 1:
The patent transitions from planar inductor layouts to three-dimensional vertical stacking configurations. Multiple inductor layers are stacked above each other with interconnect vias providing electrical connections between layers, enabling sufficient inductance to be achieved within a smaller footprint by utilizing the vertical dimension rather than expanding horizontally.
Solution Approach 2:
The patent implements nested configurations where inductors are positioned within available spaces of the package structure, and multiple inductor layers are vertically nested above each other. This nesting approach maximizes the utilization of three-dimensional space, allowing compact packaging while maintaining required inductance values through the combined effect of multiple nested inductor elements.
2Adaptability or versatility
If multiple inductors are placed in the package, then functional requirements are met, but mutual inductance interference increases
Solution Approach 1:
The patent extracts and separates the magnetic fields of multiple inductors by positioning them in different vertical layers with sufficient spacing and orientation control. By separating the inductors into distinct spatial zones through vertical stacking and strategic positioning, the harmful mutual inductance coupling between adjacent inductors is minimized, allowing multiple inductors to coexist without significant interference.
Solution Approach 2:
The patent employs asymmetric positioning and orientation of inductors in the vertical stack, where inductors are deliberately placed at different heights and orientations rather than in symmetric patterns. This asymmetric arrangement reduces the magnetic coupling between adjacent inductors by breaking the symmetry of their magnetic field interactions, thereby minimizing mutual inductance effects.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration enables high inductance values with reduced spatial occupancy, enabling smaller package sizes without compromising performance, and allows for vertical stacking and lateral sharing of space, thus enhancing the compactness of integrated devices and packages.
Implementation Method 1
The first inductor comprises a first spiral comprising a first origin and a first tail and a second spiral comprising a second origin and a second tail
Data Source
AI summary
An integrated device comprising a die substrate; and a die interconnection portion coupled to the die substrate. The die interconnection comprises a first inductor and a second inductor. The first inductor comprises a first spiral comprising a first origin and a first tail and a second spiral comprising a second origin and a second tail.