File Mapping Unit for Persistent Memory Address Translation
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Solution Overview
Problem
Existing memory systems face inefficiencies due to the conflicting characteristics of Random Access Memory (RAM) and persistent storage devices, such as high cost, power consumption, and latency, especially when accessing large data files stored in file-based systems, which leads to significant delays in data access requests.
Innovation Solution
A memory unit with a file mapping unit that translates virtual addresses to physical addresses using pre-stored mapping information, eliminating the need for software functions and exception handling routines, thereby speeding up data access by directly accessing persistent storage devices.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If data is stored in persistent memory devices using a file-based system, then data can be stored persistently and in large amounts, but data access latency increases significantly due to software function calls and exception handling routines
Solution Approach 1:
The patent pre-loads file metadata (file headers, directory structures, allocation tables) into the memory unit before data access requests are made. This preliminary action allows the memory unit to quickly locate and access data without requiring real-time software processing of file system structures, thereby reducing access latency while maintaining persistent storage capabilities
Solution Approach 2:
The patent introduces a memory unit as an intermediary layer between the processor and persistent memory devices. This memory unit includes file mapping structures that translate virtual file addresses to physical memory addresses, eliminating the need for software exception handling routines and reducing access latency while maintaining file-based persistent storage
2Speed
If RAM is used for fast data access, then data access speed is high, but cost, power consumption, and space occupation increase
Solution Approach 1:
The patent implements a hierarchical memory structure where frequently accessed file metadata and data are cached in the memory unit (closer to processor with faster access), while less frequently accessed data remains in persistent memory devices. This local quality differentiation allows fast access for critical data while conserving power and space for bulk storage
Solution Approach 2:
The patent segments the memory system into multiple levels: a memory unit with file mapping capabilities for fast access to active data, and persistent memory devices for bulk storage. This segmentation allows the system to use expensive, power-intensive memory only for necessary data while maintaining overall fast access performance
3Adaptability or versatility
If software exception handling routines are used to map virtual addresses to physical addresses in file-based systems, then address mapping can be performed, but processing delays increase
Solution Approach 1:
The patent replaces software-based exception handling routines with hardware-based file mapping structures in the memory unit. The memory unit includes dedicated circuitry for translating virtual file addresses to physical memory addresses using pre-loaded file metadata, eliminating software processing delays while maintaining address mapping capability
Solution Approach 2:
The patent pre-loads file system metadata (allocation tables, directory structures, file headers) into the memory unit before data access requests. This preliminary population of mapping information allows the hardware mapping structures to quickly translate addresses without requiring real-time software processing, reducing delays while maintaining adaptability
Data Source
AI summary
A memory unit and method are disclosed. The memory unit comprises: at least one controller interfaced with at least one corresponding persistent memory device operable to store files in accordance with a file system; and a file mapping unit operable, in response to a virtual file access request from a memory management unit of a processor, the virtual file access request having a virtual address within a virtual address space associated with one of the files identifying data to be accessed, to map the virtual address to a physical address of the data within the one of the files using pre-stored mapping information and to issue a physical access request having the physical address to access the data within the one of the files.


