Filler Dielectric Mitigates Via Misalignment in Air-Gap Interconnects
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Solution Overview
Problem
Conventional methods for forming air-gaps in integrated circuits result in increased parasitic capacitance and misalignment issues due to damaged low-k dielectric layers, which compromise the benefits of reduced capacitance and lead to diffusion of copper into the dielectric, degrading the circuit.
Innovation Solution
The introduction of a filler dielectric material with a lower dielectric constant than the low-k dielectric layer and capping layer, which fills air-gaps formed by removing damaged low-k dielectric layers, reducing parasitic capacitance and improving misalignment windows.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Loss of energy
If air-gaps are formed by removing damaged low-k dielectric portions, then parasitic capacitance is reduced, but the misalignment window for via formation is significantly reduced
Solution Approach 1:
A filler dielectric material is introduced as an intermediary substance to fill the air-gaps formed during the interconnect structure fabrication. This filler material serves as a mediator that maintains the low-k dielectric properties while providing a stable target for via formation, thereby resolving the contradiction between reducing parasitic capacitance and maintaining misalignment window.
2Ease of manufacture
If ESL is formed filling into air-gaps, then the interconnect structure is completed, but line capacitances are increased significantly
Solution Approach 1:
The dielectric constant parameter of the filler material is specifically selected to be lower than that of the ESL material. This parameter change ensures that even when ESL fills the air-gaps, the overall line capacitance remains low because the filler material maintains the low-k property in the critical regions adjacent to conductive lines.
3Ease of manufacture
If copper lines are formed in damaged low-k dielectric, then interconnect structure is built, but copper diffusion into dielectric occurs degrading the circuit
Solution Approach 1:
The filler dielectric material acts as an intermediary barrier between the copper lines and the damaged low-k dielectric portions. This filler material prevents direct contact and diffusion between copper and the degraded dielectric, thereby maintaining circuit reliability while allowing the interconnect structure to be formed.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach effectively reduces parasitic capacitance, electro-migration, and time-dependent dielectric breakdown while maintaining the benefits of reduced capacitance, and enhances the misalignment window during via formation.
Implementation Method 1
The filler dielectric material has a dielectric constant (k value) less than a k value of the capping layer
Data Source
AI summary
An integrated circuit structure is provided. The integrated circuit structure includes a semiconductor substrate; and a metallization layer over the semiconductor substrate. The metallization layer includes a conductive line; a low-k dielectric region adjacent and horizontally spaced apart from the conductive line by a space; and a filler dielectric material filling at least a portion of the space, wherein the filler dielectric material and the low-k dielectric region are formed of different materials. The integrated circuit structure further includes a capping layer over and adjoining the filler dielectric material and the low-k dielectric region. The filler dielectric material has a dielectric constant (k value) less than a k value of the capping layer.