Filterless Digital PLL Using Direct Frequency Detection for Jitter Control
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Solution Overview
Problem
Traditional phase-locked loops (PLLs) face a fundamental design trade-off known as the loop bandwidth trade-off, where improving jitter rejection comes at the expense of increased loop transients and vice versa, leading to inconsistent and temperamental circuit performance.
Innovation Solution
A filterless digital phase-locked loop (DPLL) is introduced, which measures frequency directly and uses an impulse response to control a number-controlled oscillator, eliminating the loop bandwidth trade-off by directly correlating transient response and jitter rejection, allowing for improved performance without the need for a loop filter.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional phase-locked loop design is used with loop filter, then jitter rejection can be improved, but loop transients increase and circuit performance becomes inconsistent
Solution Approach 1:
The patent extracts and removes the loop filter component from the traditional phase-locked loop design. By taking out the loop filter, the invention eliminates the source of loop transients while maintaining jitter rejection through an alternative frequency detection mechanism that directly measures frequency without requiring filtering, thus resolving the contradiction between jitter rejection and loop transient stability
Solution Approach 2:
The patent replaces the traditional mechanical/analog loop filter system with a digital frequency detection system. Instead of using analog filtering components that introduce transients, the invention uses digital frequency measurement and impulse response techniques to achieve jitter rejection without the harmful effects of loop filtering, substituting one system paradigm for another to resolve the contradiction
2Stability of the object's composition
If loop filter is used to reduce loop transients, then stability improves, but jitter rejection deteriorates
Solution Approach 1:
The patent inverts the traditional approach by removing the loop filter entirely and using impulse response instead. Rather than trying to balance the trade-off with filter design, the invention reverses the conventional wisdom by showing that no filter is needed if frequency is measured directly and impulse response is used, thereby achieving both stability and jitter rejection simultaneously
Solution Approach 2:
The patent changes the fundamental parameter of frequency measurement from phase-based detection to direct frequency detection. This parameter change enables the system to achieve jitter rejection without requiring loop filtering, as direct frequency measurement provides the necessary precision without introducing the stability issues associated with traditional loop filters
Data Source
AI summary
There is disclosed in one example a digital phase-locked loop (DPLL) circuit adapted to avoid loop-bandwidth tradeoff, the circuit including: a frequency dimension frequency detector having an external frequency input and a feedback frequency input, the frequency dimension frequency detector including circuitry to measure a frequency difference between the external frequency input and the feedback frequency input and to drive an impulse signal, wherein the impulse signal is of a first species if the difference is positive and of a second species if the difference is negative; and a number-controlled oscillator (NCO) including circuitry to drive an output clock and to adjust the frequency of the output clock responsive to the impulse signal, wherein an output of the NCO provides the feedback frequency input of the frequency dimension frequency detector.