Filterless Double-Conversion Receiver Circuits for Dual-Carrier Reception
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Solution Overview
Problem
Modern handset receivers face challenges in aggregating signals from multiple non-contiguous RF carriers due to limitations in existing technologies, which affect wireless throughput and signal processing efficiency.
Innovation Solution
The development of intermediate-frequency-filterless, double-conversion receiver circuits that utilize multiple mixers clocked by different phases of common clock frequencies, harmonic rejection termination networks, and in-phase trans-impedance amplifiers to enable concurrent dual-carrier reception without the need for intermediate-frequency filtering.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If traditional intermediate-frequency filtering is used in receivers, then signal separation is achieved, but device complexity and loss of information increase
Solution Approach 1:
The patent extracts and eliminates the intermediate-frequency filtering stage from the traditional receiver architecture. By removing the IF filter component, the system avoids the complexity and information loss associated with traditional filtering while maintaining signal separation through alternative means (direct conversion to baseband frequencies).
Solution Approach 2:
The patent introduces digital signal processing and multiple mixer stages as intermediary elements to replace the traditional IF filter. These intermediaries perform signal separation in the digital domain, achieving the same functional result without the physical filtering constraints and losses.
2Productivity
If multiple non-contiguous RF carriers are aggregated, then wireless throughput increases, but signal processing complexity and loss of information increase
Solution Approach 1:
The patent segments the received signal processing into multiple parallel paths, each handling a specific RF carrier. By using M first mixers and M sets of N second mixers, the system processes multiple non-contiguous carriers simultaneously through segmented mixing stages, maintaining signal integrity while increasing throughput.
Solution Approach 2:
The patent transitions from traditional frequency-domain filtering to a time-domain and phase-domain approach. By using multiple clock phases and harmonic rejection techniques, the system separates carriers in the temporal and phase dimensions rather than relying solely on frequency filtering, thereby preserving signal information.
3Object-affected harmful factors
If intermediate-frequency filtering is implemented, then spurious responses are reduced, but device complexity and manufacturing precision requirements increase
Solution Approach 1:
The patent replaces the mechanical/physical IF filtering system with an electronic/digital signal processing system. By using multiple mixer stages with different clock phases and harmonic rejection termination networks, the system suppresses spurious responses through electronic means rather than physical filtering, reducing manufacturing precision requirements.
Solution Approach 2:
The patent changes the operating parameters of the mixing stages, using multiple clock frequencies and phases (M first mixers clocked by first common clock frequency, M sets of N second mixers clocked by second common clock frequency). This parameter variation allows spurious responses to be separated and rejected in the digital domain, achieving suppression without complex physical filters.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This solution allows for efficient concurrent reception of RF carriers at distinct frequencies, reducing spurious responses and enhancing out-of-band linearity, while supporting higher clock speeds and more harmonics suppression, thus improving wireless throughput and signal processing efficiency.
Implementation Method 1
M first mixers that each receive an input signal, that are each clocked by a different phase of a first common clock frequency, and that each provide an output
Implementation Method 2
M in-phase trans-impedance amplifiers that each receive the in-phase output from a corresponding one of the M harmonic rejection termination networks and that each provide an in-phase baseband output signal
Data Source
AI summary
Circuits for a receiver, comprising: M first mixers that each receive an input signal, that are each clocked by a different phase of a first common clock frequency, and that each provide an output, wherein M is a count of the first mixers; and M sets of N second mixers, wherein N is a count of the second mixers in each of the M sets, wherein each second mixer in each set of N second mixers receives as an input the output of a corresponding one of the M first mixers, wherein each of the N second mixers in each of the M sets are clocked by a different phase of a second common clock frequency, and wherein each of the second mixers has an output.