Filterless Double-Conversion Receiver Circuits

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Solution Overview

Problem

Modern handset receivers face challenges in aggregating signals from multiple non-contiguous RF carriers due to limitations in existing technologies, which affect wireless throughput and signal processing efficiency.

Innovation Solution

The development of intermediate-frequency-filterless, double-conversion receivers with multiple mixers and trans-impedance amplifiers, utilizing direct digital synthesis and harmonic recombination to enable concurrent dual-carrier reception without the need for intermediate frequency filtering.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If traditional intermediate frequency filtering is used in receivers, then signal separation is achieved, but device complexity and loss of signal increase

Engineering Contradiction:
Improvesignal processing capabilityVSAvoidintermediate frequency filter complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent removes the intermediate frequency filter from the receiver architecture, extracting the filtering function and replacing it with a direct digital synthesis approach. The receiver converts RF signals directly to baseband without an intermediate frequency stage, eliminating the need for complex IF filters while maintaining signal separation capability through digital processing.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent replaces the mechanical/electronic intermediate frequency filter system with a digital signal processing system. Direct digital synthesis and digital baseband processing substitute for traditional analog filtering, reducing device complexity while improving signal processing flexibility and reliability.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Productivity

If multiple non-contiguous RF carriers are aggregated, then wireless throughput increases, but signal processing complexity increases

Engineering Contradiction:
Improvewireless throughputVSAvoidsignal processing complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The patent uses multiple independent mixer paths (first mixers and second mixers) that process different RF carriers simultaneously. Each mixer path is clocked by a different phase of a common clock, allowing parallel processing of multiple non-contiguous carriers without increasing overall system complexity.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent employs a universal baseband processing architecture that handles multiple RF carriers through a common set of trans-impedance amplifiers and digital processing circuits. The same hardware infrastructure processes signals from multiple carriers, achieving multi-functionality without proportional increases in device complexity.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Productivity

If concurrent dual-carrier reception is implemented, then signal processing efficiency improves, but spurious responses increase

Engineering Contradiction:
Improvesignal processing efficiencyVSAvoidspurious responses
Core Design Contradiction:
ProductivityVSObject-generated harmful factors

Solution Approach 1:

The patent uses periodic clocking signals with different phases to drive the mixer circuits. The first mixers are clocked by different phases of a first common clock frequency, and second mixers are clocked by different phases of a second common clock frequency. This periodic action with phased timing creates constructive interference for desired signals while causing destructive interference for spurious responses, enabling efficient dual-carrier reception with reduced harmonics and intermodulation products.

Inventive Principle:
Principle #19Periodic action

Data Source

PatentUS11791854B2Circuits for intermediate-frequency-filterless, double-conversion receivers
Publication Date: 2023.10.17 THE TRUSTEES OF COLUMBIA UNIV IN THE CITY OF NEW YORK
  • US11791854B2 patent drawing
  • US11791854B2 patent drawing
  • US11791854B2 patent drawing

AI summary

Circuits for receivers including: N first mixers that each receive an input signal, are each clocked by a different phase of a first common clock frequency, and each provide an output; and for each N first mixer: a set of M second mixers, wherein each second mixer receives as an input the output of a same one of the N first mixers unique to the set, wherein each of M second mixer is clocked by a different phase of a second common clock frequency, and wherein each second mixer has an output; a set of M resistors having a first side and a second side, wherein the first side is connected to the output of a corresponding one of the set of M second mixers; and a set of M trans-impedance amplifiers that each having an input connected to the second side of a corresponding one of the resistors.