Fin-Based Thin Film Resistor for Low Variation Integration
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Solution Overview
Problem
Conventional resistors in semiconductor manufacturing face challenges with high variation and temperature coefficients, particularly in high-k/metal gate process technologies, leading to increased costs and complexity, while traditional precision resistors are difficult to integrate due to fabrication issues.
Innovation Solution
The development of fin-based thin film resistors, which utilize a silicon fin backbone and a metal resistor layer with near-zero temperature coefficient, allowing for precise control of resistance values and high packing density, enabling cost-neutral and low-variation integration within fin-FET transistor architecture.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional resistors are used in high-k/metal gate process technologies, then manufacturing cost and fabrication complexity increase, but resistance precision and temperature stability deteriorate due to high variation and temperature coefficients
Solution Approach 1:
The patent merges the resistor fabrication process with the existing fin-FET manufacturing process. The metal resistor layer is deposited conformally on the fin structure using the same deposition chambers and processes already employed for transistor gate electrodes and interconnect layers, eliminating separate resistor fabrication steps and reducing overall device complexity while maintaining high resistance precision
Solution Approach 2:
The metal layer serving as the resistor is fabricated using the same universal deposition processes and materials already established for the high-k/metal gate transistor fabrication. This multi-functional approach allows the same process equipment and material systems to produce both active transistor components and passive resistor components, reducing fabrication complexity while achieving precise resistance values with near-zero temperature coefficients
2Manufacturing precision
If traditional precision resistors are integrated into fin-FET architecture, then resistance precision improves, but integration difficulty increases due to fabrication issues
Solution Approach 1:
The patent segments the fin structure into functional regions where different portions serve as transistor channels while adjacent portions serve as resistor elements. By patterning the metal resistor layer to extend over specific fin regions and using selective contact formation, the design achieves precise resistance values through geometric segmentation of the fin structure, simplifying integration into the fin-FET architecture
Solution Approach 2:
The patent introduces an intermediary isolation layer between the metal resistor layer and the fin structure that facilitates precise resistance control. This intermediary layer, deposited conformally on the fin, provides a controlled interface that enables accurate resistance values while maintaining compatibility with standard fin-FET fabrication processes, thereby improving both precision and ease of integration
3Quantity of substance
If feature scaling continues to increase device density, then capacity increases, but lithographic constraints and spacing requirements become more severe
Solution Approach 1:
The patent transitions from planar resistor design to three-dimensional fin-based resistor structures. By utilizing the vertical dimension of the fin and depositing metal layers conformally on all fin surfaces, the design achieves higher device density without increasing lithographic complexity. The resistance value is controlled by fin geometry and metal layer thickness rather than by planar pattern dimensions, thereby bypassing lithographic spacing constraints
Data Source
AI summary
Fin-based thin film resistors, and methods of fabricating fin-based thin film resistors, are described. In an example, an integrated circuit structure includes a fin protruding through a trench isolation region above a substrate. The fin includes a semiconductor material and has a top surface, a first end, a second end, and a pair of sidewalls between the first end and the second end. An isolation layer is conformal with the top surface, the first end, the second end, and the pair of sidewalls of the fin. A resistor layer is conformal with the isolation layer conformal with the top surface, the first end, the second end, and the pair of sidewalls of the fin. A first anode cathode electrode is electrically connected to the resistor layer. A second anode or cathode electrode is electrically connected to the resistor layer.