Fin-Based Strap Cell Structure for SRAM Performance
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Solution Overview
Problem
Fin-based well strap cells in SRAM arrays experience increased pick-up resistance and reduced latch-up performance as fin dimensions shrink, leading to non-uniform performance among SRAM cells.
Innovation Solution
Modifying the well doping configuration of fin-based well strap cells by removing n-wells from p-type well straps and using an I-shaped p-type well strap configuration, where the p-type well strap is disposed between n-type well straps, to reduce pick-up resistance without affecting the characteristics of FinFETs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If fin dimensions are shrunk to enhance SRAM performance, then device scaling is achieved, but pick-up resistance increases and latch-up performance deteriorates
Solution Approach 1:
The patent applies local quality by creating an I-shaped p-type well strap configuration where the middle portion has different doping characteristics than the edge portions. This localized structural differentiation allows the middle section to provide enhanced latch-up protection while the edge sections maintain effective pick-up resistance, resolving the contradiction between scaled fin dimensions and reliability.
2Stability of the object's composition
If conventional well strap cells are used, then uniform charge distribution is achieved, but pick-up resistance increases
Solution Approach 1:
The well strap cell is segmented into distinct functional regions: edge portions with n-type well straps for pick-up resistance and a middle portion with I-shaped p-type well strap for charge distribution stability. This segmentation allows each region to optimize its specific function, reducing overall pick-up resistance while maintaining uniform charge distribution across the SRAM array.
Data Source
AI summary
Fin-based well straps are disclosed for improving performance of memory arrays, such as static random access memory arrays. An exemplary well strap cell is disposed between a first memory cell and a second memory cell. The well strap cell includes a p-well, a first n-well, and a second n-well disposed in a substrate. The p-well, the first n-well, and the second n-well are configured in the well strap cell such that a middle portion of the well strap cell is free of the first n-well and the second n-well along a gate length direction. The well strap cell further includes p-well pick up regions to the p-well and n-well pick up regions to the first n-well, the second n-well, or both. The p-well has an I-shaped top view along the gate length direction.