Fin-Based BJT Gate Layout for Leakage and ΔVbe Stability

Resolve Bottlenecks,
Find Innovative SolutionsGenerate Solutions

Solution Overview

Problem

As semiconductor technology advances into nanometer process nodes, bipolar junction transistors (BJTs) face challenges in maintaining performance and reducing leakage due to decreasing feature sizes, which affects the stability of base-emitter voltage (ΔVbe) and overall device reliability.

Innovation Solution

The formation of BJTs using FinFET processes, where p-type and n-type FinFET transistors are tied together to form collector, base, and emitter terminals, with separate gate structures over the emitter and base terminals to reduce leakage and improve ΔVbe stability, and the surface area of BJTs is expanded to provide appropriate spacing between gate structures.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If feature size is reduced to increase integration density, then more components can be integrated into a given area, but leakage increases and base-emitter voltage stability deteriorates

Engineering Contradiction:

Improveintegration densityVSAvoidbase-emitter voltage stability

Core Design Contradiction:

ProductivityVSReliability

Solution Approach 1:

The gate structure is divided into multiple separate gates: a first gate over the emitter terminal and a second gate over the base terminal. This segmentation allows independent control and optimization of each terminal's electrical characteristics, reducing leakage and improving voltage stability while maintaining high integration density.

Inventive Principle:

Principle #1Segmentation

Solution Approach 2:

Different gate structures are applied to different terminals based on their specific requirements. The first gate structure over the emitter terminal is optimized for emitter characteristics, while the second gate structure over the base terminal is optimized for base characteristics, allowing local optimization of electrical properties without compromising overall device performance.

Inventive Principle:

Principle #3Local quality

2Reliability

If separate gate structures are added over emitter and base terminals to reduce leakage, then base-emitter voltage stability improves, but device complexity increases

Engineering Contradiction:

Improvebase-emitter voltage stabilityVSAvoidgate structure complexity

Core Design Contradiction:

ReliabilityVSDevice complexity

Solution Approach 1:

The first gate and second gate are integrated within a unified FinFET transistor structure, sharing common fabrication processes and structural elements. This merging approach implements separate gating functionality without proportionally increasing device complexity, as both gates are formed using the same FinFET manufacturing methodology.

Inventive Principle:

Principle #5Merging (Combining)

Data Source

PatentUS11843038B2Bipolar junction transistor with gate over terminals

Publication Date: 2023.12.12 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD

AI summary

Embodiments include a first set of fins having an emitter of a bipolar junction transistor (BJT) disposed over the first set of fins, a second set of fins having a base of the BJT disposed over the second set of fins, and a third set of fins having a collector of the BJT disposed over the third set of fins. A first gate structure is disposed over the first set of fins adjacent to the emitter. A second gate structure is disposed over the second set of fins adjacent to the base. A third gate structure is disposed over the third set of fins adjacent to the collector. The first gate structure, second gate structure, and third gate structure are physically and electrically separated.