Fin Bump Compensation for Etching Uniformity in Semiconductor Structures

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Solution Overview

Problem

In semiconductor manufacturing, achieving uniformity in the critical dimension (CD) of photolithographic patterns is challenging due to etching uniformity issues, which are influenced by etchant conditions, layout patterns, and loading effects, affecting the accuracy of integrated circuits.

Innovation Solution

A method involving a fin cut mask with a compensation pattern is used in the fin cut process, where a fin bump is formed in the second region after the fin cut and remove processes to improve etching uniformity and CD control, utilizing a fin cut mask with cut patterns and a compensation pattern to address the etching loading effect near the juncture of different regions.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If a conventional photolithographic process is used without compensation patterns, then the manufacturing process is simple, but the etching uniformity and critical dimension control deteriorate

Engineering Contradiction:
Improvecritical dimension uniformityVSAvoidmask pattern complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The compensation pattern is designed and incorporated into the mask before the photolithographic process begins. This preliminary action anticipates the etching loading effect and pre-compensates for it, ensuring that the final etched pattern achieves uniform critical dimensions without requiring complex real-time adjustments during manufacturing

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The compensation pattern is applied locally in specific regions where etching loading effects are expected to occur, rather than uniformly across the entire mask. This localized approach improves critical dimension control in problem areas while maintaining simplicity in regions where compensation is not needed

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If the etching process is performed without compensation for loading effects, then the process is fast and simple, but the etching uniformity across different regions deteriorates

Engineering Contradiction:
Improveetching uniformityVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSEase of manufacture

Solution Approach 1:

The compensation pattern is prepared in advance during mask design, before the etching process begins. This preliminary action embeds the compensation strategy into the mask structure itself, allowing the etching process to proceed with standard simplicity while achieving improved uniformity through the pre-engineered mask features

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The compensation pattern acts as an intermediary element between the mask design and the etching process. It mediates the interaction by modifying the local etching conditions through its presence or absence, thereby achieving uniform etching results without requiring complex process adjustments

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS9837282B1Semiconductor structure
Publication Date: 2017.12.05 MARLIN SEMICON LTD
  • US9837282B1 patent drawing
  • US9837282B1 patent drawing
  • US9837282B1 patent drawing

AI summary

A semiconductor structure includes a semiconductor substrate with a first region and a second region defined thereon. The first region is disposed adjoining the second region in a first direction. The semiconductor substrate includes fin structures, first recessed fins, and a bump. The fin structures are disposed in the first region. Each fin structure is elongated in the first direction. The first recessed fins are disposed in the second region. Each first recessed fin is elongated in the first direction. A topmost surface of each first recessed fin is lower than a topmost surface of each fin structure. The bump is disposed in the second region and disposed between two adjacent recessed fins in the first direction. A topmost surface of the bump is higher than the topmost surface of each first recessed fin and lower than the topmost surface of each fin structure.