Semiconductor Fin Cap Layer for Germanium Out-Diffusion Control
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Solution Overview
Problem
As semiconductor devices continue to integrate more components into a given area with reduced minimum feature sizes, issues such as out-diffusion of germanium from semiconductor fins lead to bending, warping, increased line-edge roughness, and variations in threshold voltage, affecting device performance.
Innovation Solution
A low-temperature process is employed to form a silicon cap layer over semiconductor fins, using pre-clean, sublimation, and deposition techniques to limit germanium out-diffusion, resulting in reduced wiggle effect and improved line-edge roughness, and a cap layer is formed to stabilize the germanium concentration.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but out-diffusion of germanium occurs leading to bending, warping, and increased line-edge roughness
Solution Approach 1:
A silicon cap layer is deposited over the germanium-containing semiconductor fin structure. This cap layer acts as a barrier that prevents germanium from diffusing outward, thereby maintaining the structural integrity and reducing line-edge roughness while allowing continued scaling for higher integration density
Solution Approach 2:
The process temperature is reduced to a low-temperature range during cap layer deposition. This parameter change limits thermal energy available for germanium diffusion, preventing the bending and warping that would otherwise occur during fabrication processing
2Productivity
If minimum feature size is reduced to increase integration density, then more components can be integrated into a given area, but variations in threshold voltage occur affecting device performance
Solution Approach 1:
The silicon cap layer serves as a protective barrier that stabilizes the germanium concentration within the semiconductor fin. By preventing germanium out-diffusion, the cap layer ensures consistent electrical properties and reduces threshold voltage variations across devices, improving reliability while maintaining high integration density
Solution Approach 2:
The cap layer is deposited in advance, before subsequent processing steps that could cause germanium diffusion. This preliminary protective action prevents threshold voltage variations from developing during later fabrication processes, ensuring device performance consistency
3Manufacturing precision
If low-temperature process is used to form cap layer, then germanium out-diffusion is limited, but additional process steps are required
Solution Approach 1:
The cap layer deposition process combines multiple functions: it provides structural protection, acts as a diffusion barrier, and stabilizes germanium concentration all in a single low-temperature processing step. This merging of functions achieves improved germanium stability without proportionally increasing overall process complexity
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The process reduces germanium out-diffusion, minimizing bending and warping of semiconductor fins, enhancing line-edge roughness and threshold voltage consistency, leading to improved device performance with increased hole mobility and reduced resistance.
Implementation Method 1
performing a sublimation process to produce a silicon precursor
Implementation Method 2
performing a deposition process wherein material from the silicon precursor is deposited on the semiconductor fin to form the cap layer
Data Source
AI summary
A semiconductor device including a cap layer and a method for forming the same are disclosed. In an embodiment, a method includes epitaxially growing a first semiconductor layer over an N-well; etching the first semiconductor layer to form a first recess; epitaxially growing a second semiconductor layer filling the first recess; etching the second semiconductor layer, the first semiconductor layer, and the N-well to form a first fin; forming a shallow trench isolation region adjacent the first fin; and forming a cap layer over the first fin, the cap layer contacting the second semiconductor layer, forming the cap layer including performing a pre-clean process to remove a native oxide from exposed surfaces of the second semiconductor layer; performing a sublimation process to produce a first precursor; and performing a deposition process wherein material from the first precursor is deposited on the second semiconductor layer to form the cap layer.