Fin Capacitor Structure With Layered Metals for Low-Leakage Linearity
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Solution Overview
Problem
In FinFET devices, controlling doping uniformity in capacitor structures is challenging due to 3D topography, leading to device leakage and reduced process windows when attempting to improve linearity and capacitance.
Innovation Solution
A method of fabricating semiconductor devices with improved linearity and uniformity by forming a capacitor structure with a substrate having fins and trenches, using insulators, multiple metal layers, and insulating layers, which are carefully patterned and aligned to minimize leakage and enhance capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If doping is increased to improve linearity and capacitance in capacitor structures, then capacitance and linearity are improved, but device leakage increases
Solution Approach 1:
The patent applies local quality by implementing different doping concentrations in different regions of the capacitor structure. Specifically, lightly-doped regions are used in areas where leakage must be minimized, while heavily-doped regions are used where high capacitance is required. This spatial variation in doping quality allows the structure to simultaneously achieve high capacitance and low leakage by optimizing each region for its specific function.
Solution Approach 2:
The capacitor structure is segmented into multiple regions with different doping characteristics. The structure divides the capacitor into distinct zones: some regions with high doping concentration for maximum capacitance, and other regions with low or zero doping for leakage control. This segmentation allows independent optimization of capacitance and leakage performance in different parts of the same capacitor structure.
2Manufacturing precision
If heavy doping is used to improve linearity, then linearity is improved, but manufacturing precision and process control become more difficult
Solution Approach 1:
Instead of uniformly heavy doping throughout the capacitor structure, the patent applies local quality by restricting heavy doping to specific regions where linearity is most critical. Other regions use moderate or light doping that is easier to control manufacturably. This localized approach maintains the necessary linearity performance while avoiding the manufacturing difficulties associated with uniform heavy doping across the entire structure.
3Reliability
If complex multi-layer structures are used to reduce leakage and enhance capacitance, then performance is improved, but device complexity increases
Solution Approach 1:
The patent segments the capacitor into multiple functional layers with different doping characteristics, where each layer serves a specific purpose: some layers provide capacitance, others provide leakage barriers, and still others provide structural support. This segmentation allows the complex performance requirements to be met through specialized layers rather than requiring a uniformly complex structure throughout.
Solution Approach 2:
The multi-layer structure is designed so that each layer serves multiple functions simultaneously. For example, certain layers provide both structural support and electrical isolation, while other layers provide both capacitance and leakage control. This multi-functionality reduces the overall device complexity by eliminating the need for separate dedicated structures for each function.
Data Source
AI summary
A semiconductor device includes a substrate having fins and trenches in between the fins, a plurality of insulators, a first metal layer, an insulating layer, a second metal layer and an interlayer dielectric. The insulators are disposed within the trenches of the substrate. The first metal layer is disposed on the plurality of insulators and across the fins. The insulating layer is disposed on the first metal layer over the plurality of insulators and across the fins. The second metal layer is disposed on the insulating layer over the plurality of insulators and across the fins. The interlayer dielectric is disposed on the insulators and covering the first metal layer, the insulating layer and the second metal layer.