Fin Capacitor Array Structure for High-Capacitance Stacked Pixels

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Solution Overview

Problem

Conventional LOFIC designs in stacked semiconductor devices face challenges in increasing capacitance without using high-K dielectrics, leading to increased image lag and reduced scalability with decreasing pixel size.

Innovation Solution

Employing fin capacitors with nested first and second electrodes, using SiO2 as the dielectric material, to achieve high capacitance without the need for high-K dielectrics, thereby facilitating increased full well capacity and reduced image lag.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Quantity of substance

If conventional LOFIC designs use high-K dielectrics to increase capacitance, then full well capacity is improved, but image lag increases and manufacturing complexity increases

Engineering Contradiction:
ImprovecapacitanceVSAvoidimage lag
Core Design Contradiction:
Quantity of substanceVSObject-generated harmful factors

Solution Approach 1:

The patent changes the dielectric material parameter from high-K dielectric to SiO2 (standard dielectric), and compensates for the lower capacitance density by increasing the capacitor area through the fins structure, achieving high capacitance without high-K dielectrics and avoiding image lag

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The capacitor electrode is segmented into multiple fins arranged in an interdigitated pattern, which increases the effective capacitor area within a compact footprint, achieving high capacitance without requiring high-K dielectric materials

Inventive Principle:
Principle #1Segmentation

2Quantity of substance

If capacitor area is increased to achieve high capacitance, then full well capacity is improved, but pixel area is consumed and resolution is reduced

Engineering Contradiction:
ImprovecapacitanceVSAvoidpixel area
Core Design Contradiction:
Quantity of substanceVSArea of stationary object

Solution Approach 1:

The patent transitions from a planar capacitor design to a three-dimensional fins structure, utilizing the vertical dimension to increase capacitor area without consuming additional lateral pixel area, thus maintaining high capacitance while preserving pixel real estate for higher resolution

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Quantity of substance

If fin capacitor density is increased to achieve high capacitance in small area, then manufacturing precision requirements increase

Engineering Contradiction:
Improvecapacitance densityVSAvoidfin alignment precision
Core Design Contradiction:
Quantity of substanceVSManufacturing precision

Solution Approach 1:

The capacitor is divided into multiple fins with interdigitated fingers, where each fin is formed through standard photolithography and etching processes. The segmented structure achieves high capacitance density while maintaining compatibility with conventional manufacturing tolerances

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The fins are designed with uniform dimensions and spacing, creating a homogeneous structure that simplifies manufacturing control and reduces sensitivity to alignment variations, enabling high capacitance density without excessive precision requirements

Inventive Principle:
Principle #33Homogeneity

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The fin capacitors provide high capacitance (80 fF to 150 fF) with a lateral area of 4.4 μm2 or less, enabling high dynamic range imaging with improved frame rates and scalability in pixel cell size.

Implementation Method 1

The image sensor includes an array of pixels having photosensitive elements (e.g., photodiodes) that absorb a portion of the incident image light and generate image charge upon absorption of the image light

Methodology Applied
Scientific EffectPhotoelectric Effect: Photoelectric Effect

Implementation Method 2

The pixel cell circuitry is coupled to a fin capacitor. The fin capacitor includes a first electrode, an insulating material, and a second electrode

Methodology Applied
Scientific EffectCapacitance: Capacitance

Data Source

PatentUS20260026127A1Stacked semiconductor device with fin capacitor
Publication Date: 2026.01.22 OMNIVISION TECHNOLOGIES INC
  • US20260026127A1 patent drawing
  • US20260026127A1 patent drawing
  • US20260026127A1 patent drawing

AI summary

A stacked semiconductor device comprising a plurality of fin capacitors disposed in or on a semiconductor substrate is described. The plurality of fin capacitors is arranged to form a fin capacitor array. A fin capacitor included in the plurality of fin capacitors comprising a first electrode, a second electrode, and an insulating material. The first electrode includes a first planar portion and a plurality of first fins extending from the first planar portion. The second electrode includes a second planar portion and a plurality of second fins extending from the second planar portion. The plurality of first fins is nested with the plurality of second fins such that the plurality of first fins and the plurality of second fins are both disposed between the first planar portion and the second planar portion. The insulating material is disposed between the plurality of first fins and the plurality of second fins.