Fin Channel Ge/Si Stack for Gate Control and Oxidation Resistance
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Solution Overview
Problem
Existing multigate devices, such as FinFETs and GAA devices, face challenges in maintaining gate control and mitigating short-channel effects while integrating with conventional IC manufacturing processes, leading to unsatisfactory performance in some aspects.
Innovation Solution
A method for fabricating semiconductor structures involves forming a germanium-comprising layer and a crystalline silicon layer on a fin structure, which provides a channel region for multigate devices, enhancing gate control and protecting the fin structure from oxidation and damage during fabrication.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multigate devices are used to improve gate control and reduce short-channel effects, then device performance is improved, but integration with conventional IC manufacturing processes becomes difficult
Solution Approach 1:
The channel region is segmented into multiple fins extending vertically from the substrate, creating a three-dimensional structure that provides multiple gate-channel interfaces. This segmentation enables improved gate control while maintaining compatibility with planar manufacturing processes by breaking down the complex 3D structure into manufacturable components
Solution Approach 2:
The invention transitions from a conventional two-dimensional planar channel to a three-dimensional vertical fin structure. The fin extends in the vertical dimension, allowing the gate to interface with multiple surfaces of the channel region, thereby improving gate control without requiring fundamental changes to the manufacturing process flow
2Ease of manufacture
If the fin structure is exposed during fabrication, then manufacturing access is improved, but oxidation and damage to the fin structure occur
Solution Approach 1:
A sacrificial layer is introduced as an intermediary material between the fin structure and the gate formation process. This sacrificial layer protects the fin structure from oxidation and damage during fabrication while allowing manufacturing access. The sacrificial layer is subsequently removed to complete the device structure
Solution Approach 2:
The sacrificial layer is deposited beforehand to cushion and protect the fin structure from harmful effects during subsequent fabrication steps. This preliminary protective measure prevents oxidation and damage before they can occur, allowing safe manufacturing access to the fin structure
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The method improves gate control and reduces short-channel effects, while the crystalline silicon layer mitigates oxidation and damage to the fin structure, leading to more reliable and efficient multigate device performance.
Implementation Method 1
forming a gate structure over a first surface and a second surface, the second surface opposing the first surface
Implementation Method 2
depositing a crystalline silicon layer on the germanium-comprising layer
Data Source
AI summary
Methods of forming and a semiconductor devices where the channel region includes a germanium-comprising layer; and a crystalline silicon layer on the germanium-comprising layer. A gate structure over a first surface and a second surface, the second surface opposing the first surface. In some implementations, the crystalline silicon layer can mitigate damage during processing.