Fin Structure Charge Storage Layer Thickness Variation for Dielectric Breakdown
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Solution Overview
Problem
In fin-type transistors, dielectric breakdown of the gate insulating film occurs unevenly, with some areas being prone to breakdown while others are not, leading to reliability issues.
Innovation Solution
A semiconductor device design where the thickness of the charge storage layer is varied across the fin surface and side surfaces, with a thicker layer on the upper surface to alleviate the electric field and enhance dielectric breakdown voltage, improving the reliability of the memory cell.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a uniform thickness charge storage layer is formed on the fin structure, then the manufacturing process is simple, but dielectric breakdown occurs unevenly leading to reliability issues
Solution Approach 1:
The charge storage layer is designed with different thicknesses at different locations: a first thickness on the upper surface of the fin and a second thickness on the side surface of the fin. This local quality variation ensures that areas with higher electric field intensity (upper surface) have a thicker charge storage layer for better breakdown resistance, while side surfaces maintain adequate but thinner layers.
Solution Approach 2:
The thickness parameter of the charge storage layer is changed across different spatial locations on the fin structure. By varying the thickness parameter from uniform to non-uniform (first thickness on upper surface, second thickness on side surface), the patent optimizes dielectric breakdown resistance while managing manufacturing complexity.
2Reliability
If the charge storage layer thickness is increased on the upper surface to improve dielectric breakdown resistance, then reliability improves, but manufacturing precision requirements increase
Solution Approach 1:
The patent applies local quality by forming the charge storage layer with a first thickness on the upper surface and a second thickness on the side surface. This approach targets the specific location (upper surface) where dielectric breakdown is most likely to occur, providing enhanced protection where needed without uniformly increasing complexity across the entire structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The varying thickness of the charge storage layer effectively relaxes the electric field on the upper surface, increasing the dielectric breakdown voltage and enhancing the rewrite durability and reliability of the memory cell.
Implementation Method 1
a first gate insulating film formed so as to cover the first insulating film and including a first trapping insulating film
Implementation Method 2
the strength of an electric field applied to the gate insulating film is different in each portion of the fin
Implementation Method 3
a thickness of the first trapping insulating film in the upper surface of the protruding portion is larger than a thickness of the first trapping insulating film in the first side surface and the second side surface
Implementation Method 4
a portion where dielectric breakdown of the gate insulating film tends to occur and a portion where dielectric breakdown of the gate insulating film hardly occurs coexist
Data Source
AI summary
The semiconductor device includes a fin FA selectively protruded from an upper surface of a semiconductor substrate SB, a gate insulating film GF1 formed on an upper surface and a side surface of the fin FA and having an insulating film X1 and a charge storage layer CSL, and a memory gate electrode MG formed on the gate insulating film GF1. Here, the thickness of the charge storage layer CSL on the upper surface of the fin FA is larger than the thickness of the charge storage layer CSL on the side surface of the fin FA.