Power Semiconductor Fin Contact Structure for Gate Isolation
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Solution Overview
Problem
Power semiconductor devices face reliability issues due to accidental electrical contacts between load terminals and gate electrodes, which can occur during production or due to device degradation, leading to reduced reliability and efficiency.
Innovation Solution
A method involving the formation of a power semiconductor device with a vertically protruding fin covered by insulation material and electrode material, where a recess is created to expose the fin, followed by the deposition of an interlayer dielectric with chamfered edges, ensuring precise alignment and insulation between the load terminal and the fin, thereby preventing electrical shorts.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the device structure is reduced to small feature sizes to improve integration, then productivity and compactness are improved, but the risk of accidental electrical contacts between load terminals and gate electrodes increases, worsening reliability
Solution Approach 1:
The method performs preliminary actions during manufacturing by forming recesses in the insulating material to pre-expose the fin structure, and applying chamfered edges to the insulating material before final assembly. These preliminary structural preparations ensure proper spacing and alignment, preventing accidental electrical contacts even when devices are closely integrated.
Solution Approach 2:
The insulating material with chamfered edges acts as an intermediary element between the electrode material and the fin structure. This intermediary component provides a controlled transition zone that maintains electrical isolation while enabling precise alignment, thereby preventing direct contact between conductive elements during integration.
2Reliability
If processing precision is increased to prevent accidental contacts, then reliability is improved, but manufacturing complexity and difficulty increase, worsening ease of manufacture
Solution Approach 1:
The recesses are formed in the insulating material during earlier processing steps, establishing predetermined safe zones before final assembly. This preliminary structuring eliminates the need for ultra-precise alignment during later manufacturing steps, as the recesses themselves provide the spacing control, thereby reducing overall manufacturing difficulty while maintaining high reliability.
Solution Approach 2:
The chamfered edges on the insulating material create a built-in cushioning zone that provides a margin of error during assembly. This beforehand cushioning ensures that even with normal manufacturing tolerances, the electrode material and fin structure maintain proper spacing, preventing accidental contacts without requiring excessive processing precision.
3Reliability
If the insulation structure is made more robust to prevent electrical shorts, then reliability is improved, but device complexity increases, worsening device complexity
Solution Approach 1:
Instead of making the entire insulating structure uniformly thicker or more robust, the invention applies local quality by forming recesses only in specific areas where the fin structure needs to be exposed, and applying chamfered edges only at critical interfaces. This localized approach provides enhanced insulation reliability where needed while keeping the overall device structure simple and avoiding unnecessary complexity throughout the entire device.
Data Source
AI summary
A method of producing a power semiconductor device includes: providing a semiconductor body with a vertically protruding fin covered by an insulation material covered by an electrode material, and an insulating material at least partially covering the electrode material; exposing a portion of the electrode material arranged above an upper portion of the fin; removing the exposed portion of the electrode material to expose the upper portion of the fin, thereby forming a respective recess adjacent to both sides of the exposed upper portion of the fin, the recesses being spatially confined by the insulation material, the electrode material and the insulating material; forming an ILD on top of the exposed portions of the device; and forming a first load terminal above the ILD and configured to contact the upper portion of the fin.