Fin Contacted ESD Devices for Heat Distribution

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

FinFET technologies face challenges with heat dissipation due to inadequate heat dissipation in electrostatic discharge (ESD) devices, leading to device degradation, and conventional fabrication processes for planar substrates are not compatible with fin-based architectures, causing integration complexity.

Innovation Solution

The method involves forming ESD devices that span multiple fins with epitaxial material and metal gate structures, along with shallow trench isolation, to increase heat dissipation into the underlying wafer, utilizing existing IC technology processes without requiring special processes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Temperature

If ESD devices are placed on a planar region of the substrate to dissipate heat, then heat dissipation is improved, but process integration complexity increases due to special processes required for finFET technologies

Engineering Contradiction:
Improveheat dissipationVSAvoidprocess integration complexity
Core Design Contradiction:
TemperatureVSDevice complexity

Solution Approach 1:

The patent merges the ESD device structure with the finFET architecture by placing ESD devices directly on the fin structure rather than requiring separate planar regions. This integration allows the ESD devices to utilize the same fin-based substrate, eliminating the need for special planarization processes while maintaining heat dissipation capabilities through the vertical fin geometry

Inventive Principle:
Principle #5Merging (Combining)

Solution Approach 2:

The patent transitions from traditional planar (2D) ESD device placement to a three-dimensional fin-based structure. By utilizing the vertical dimension of the fins, the ESD devices gain increased surface area and volume for heat dissipation without requiring additional planar space or special processing steps, thus resolving the contradiction between heat dissipation and process complexity

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Reliability

If finFET technology is used to improve device performance, then device performance is improved, but heat dissipation capability deteriorates due to smaller silicon volume

Engineering Contradiction:
Improvedevice performanceVSAvoidheat dissipation capability
Core Design Contradiction:
ReliabilityVSTemperature

Solution Approach 1:

The patent exploits the vertical dimension of the fin structure to increase the effective heat dissipation volume. The fin geometry provides a three-dimensional heat conduction path from the ESD device into the substrate, effectively increasing the silicon volume available for heat dissipation while maintaining the compact footprint required for high-performance finFET scaling

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

3Ease of manufacture

If conventional planar substrate processes are used for ESD devices, then manufacturing simplicity is maintained, but compatibility with fin-based architectures deteriorates

Engineering Contradiction:
Improvemanufacturing simplicityVSAvoidcompatibility with fin-based architectures
Core Design Contradiction:
Ease of manufactureVSAdaptability or versatility

Solution Approach 1:

The patent creates a universal structure that serves both ESD protection and finFET device functions. The fin structure is designed to simultaneously provide the active device region for finFET operation and the heat dissipation path for ESD devices, allowing a single fabrication process to manufacture both device types without requiring architecture-specific process variations

Inventive Principle:
Principle #6Universality (Multi-functionality)

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances heat distribution capabilities, preventing premature failure of ESD devices and simplifies integration into fin technologies by increasing the silicon volume for heat dissipation and using existing IC manufacturing processes.

Implementation Method 1

forming an epitaxial material spanning the two or more of the plurality of fins

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Implementation Method 2

dissipating its generated heat into the underlying wafer

Methodology Applied
Scientific EffectThermal conduction: Conduction (thermal)

Data Source

PatentUS9236374B2Fin contacted electrostatic discharge (ESD) devices with improved heat distribution
Publication Date: 2016.01.12 GLOBALFOUNDRIES US INC
  • US9236374B2 patent drawing
  • US9236374B2 patent drawing
  • US9236374B2 patent drawing

AI summary

Fin contacted electrostatic discharge (ESD) devices with improved heat distribution and methods of manufacture are disclosed. The method includes forming a plurality of fins on a substrate which is aligned with at least one well region in the substrate. The method further includes forming at least one electrostatic discharge (ESD) device spanning two or more of the plurality of fins. The forming of the ESD device includes forming an epitaxial material spanning the two or more of the plurality of fins and forming one or more contacts on the epitaxial material.