Fin Design Mask Decomposition for Directed Self-Assembly

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Optical lithography has limitations in achieving minimum dimensions due to finite resolution, leading to corner rounding and overlay variations when patterning semiconductor fins, compromising reproducibility and reliability.

Innovation Solution

A method involving directed self-assembly, where a design layout is decomposed into guiding patterns and cut patterns, with adjustments to edge lengths and shapes to accommodate the characteristics of the self-assembly material, generating guiding and cut masks to improve overlay tolerance and pattern fidelity.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If optical lithography is used to pattern semiconductor fins, then the manufacturing process is simple and direct, but the minimum dimensions cannot be achieved due to finite resolution, resulting in corner rounding and overlay variations

Engineering Contradiction:
Improveminimum dimension precisionVSAvoidpatterning process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent divides the single lithography step into multiple sequential steps: forming guiding patterns first, then using them to direct self-assembly of block copolymer materials for creating the final fin patterns. This segmentation allows each step to operate at optimized dimensions, achieving sub-lithographic precision through multi-stage processing

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces guiding patterns as intermediary structures that mediate between the lithography step and the final fin pattern. These guiding patterns serve as templates that direct the self-assembly of block copolymers, enabling precise pattern transfer without directly lithographing the final fin structures

Inventive Principle:
Principle #24Intermediary (Mediator)

2Reliability

If traditional lithographic masks are used for patterning, then the process is straightforward, but overlay variations and corner rounding compromise reproducibility and reliability

Engineering Contradiction:
Improvefin pattern reproducibilityVSAvoidmask design complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent performs preliminary actions by first creating guiding patterns and block copolymer self-assembly structures before forming the final fin patterns. This preliminary structuring establishes precise geometric frameworks that guide subsequent etching steps, ensuring reproducible fin dimensions and positions

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent changes the physical and chemical parameters of the patterning process by transitioning from direct optical lithography to a self-assembly-based approach using block copolymers. This parameter change enables achievement of smaller feature sizes with better dimensional control, improving fin pattern reliability

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enhances the reproducibility and reliability of semiconductor fins by improving overlay tolerance and pattern fidelity through the use of guiding and cut masks tailored to the self-assembly material's characteristics.

Implementation Method 1

Directed self-assembly (DSA) offers an alternative method for forming periodic structures such as a one dimensional array of semiconductor line structures

Methodology Applied
Scientific EffectDirected self-assembly: Self-Assembly

Data Source

PatentUS8656322B1Fin design level mask decomposition for directed self assembly
Publication Date: 2014.02.18 GLOBALFOUNDRIES US INC
  • US8656322B1 patent drawing
  • US8656322B1 patent drawing
  • US8656322B1 patent drawing

AI summary

A design layout including shapes of target areas for forming semiconductor fins employing directed self-assembly can be decomposed into guiding patterns and cut patterns. The lengthwise edges of the shapes of target areas are adjusted. Widthwise edges of the adjusted shapes are extended outward to generate diffusion shapes. Guiding pattern shapes are then generated employing the diffusion shapes. Taper edges are adjusted based on process bias of a photoresist material to be subsequently employed. Optionally, a portion of a guiding pattern shape between diffusion shapes may be removed as a connection shape. The guiding pattern shapes can define at least one guiding pattern mask for lithographic pattern of guiding pattern shapes, and cut shapes can be derived from the diffusion shapes and the guiding pattern shapes. The guiding pattern shapes and the cut shapes may be adjusted to accommodate effects at device cell edges and at device macro edges.