Semiconductor Fin Diffusion Reduction Region
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Solution Overview
Problem
Semiconductor devices face challenges in preventing or reducing short channel effects, which affect their reliability and performance due to dopant diffusion issues.
Innovation Solution
The semiconductor device incorporates a diffusion reduction region with a dopant having a lower diffusion coefficient than phosphorus, adjacent to the recess regions and sidewalls, along with source/drain patterns doped with specific dopants to minimize dopant diffusion and enhance channel region characteristics.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If recess regions are deepened to improve device performance, then charge mobility increases, but dopant diffusion control becomes more difficult
Solution Approach 1:
The patent applies local quality by creating a diffusion reduction region with specific dopant concentration characteristics localized at the bottom and sidewalls of the recess regions. This localized dopant engineering maintains high charge mobility in the bulk of the recess while controlling dopant diffusion at critical interfaces with the channel.
Solution Approach 2:
The patent applies preliminary action by pre-forming the diffusion reduction region with appropriate dopant concentration before final source/drain doping steps. This preliminary dopant distribution prevents excessive diffusion during subsequent processing while maintaining the desired deep recess structure for high charge mobility.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This configuration effectively reduces short channel effects, increases charge mobility, and decreases resistance, thereby improving the device's operating speed and direct current performance.
Implementation Method 1
a diffusion reduction region adjacent to each of a plurality of bottoms of the plurality of recess regions and each of a plurality of sidewalls of the plurality of recess regions, the diffusion reduction region including a dopant having a lower diffusion coefficient than phosphorus (P)
Data Source
AI summary
A semiconductor device including an active fin that protrudes from a substrate and forms a plurality of recess regions spaced apart from each other, a gate pattern between the plurality of recess regions that covers a lateral surface and a top surface of the active fin, a plurality of source/drain patterns in the plurality of recess regions, and a diffusion reduction region adjacent to each of a plurality of bottoms of the plurality of recess regions and each of a plurality of sidewalls of the plurality of recess regions, the diffusion reduction region including a dopant having a lower diffusion coefficient than phosphorus (P).