Fin Structure Dummy Fins Precision Etching Control
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Solution Overview
Problem
The miniaturization of semiconductor devices poses challenges in precisely defining the position and controlling the etching of fin structures in Fin FETs, leading to issues like fin collapse and over-etching due to limitations in current mask and lithography techniques.
Innovation Solution
A method involving the formation of a sacrificial mandrel with an indentation on a substrate, followed by the creation of spacers and subsequent etching to form fin-shaped and dummy fin-shaped structures, allowing for precise control and reduced gap between epitaxial layers, enabling improved contact and reduced resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If current mask and lithography techniques are used to form fin structures, then the fabrication process is simpler, but the position definition precision and etching control are insufficient, leading to fin collapse and over-etching
Solution Approach 1:
The fabrication process is divided into multiple stages: forming mandrels with indentations, creating spacers, performing first etching to form fin structures, and performing second etching to form dummy fin structures. This segmentation allows precise control of each step, particularly the etching depth and position definition, while maintaining overall process manageability through systematic breakdown of complex operations
Solution Approach 2:
Mandrels with pre-formed indentations are created before the etching process. These indentations serve as preliminary structures that define the exact position and depth control points for subsequent etching operations, enabling precise fin structure formation without requiring ultra-precise lithography. The spacer formation is also a preliminary action that establishes etching boundaries before the actual fin etching occurs
2Productivity
If the width of each fin and pitch between fins are shrunk to meet miniaturization requirements, then device density increases, but the control of etching time and position becomes more difficult, leading to fin collapse and over-etching
Solution Approach 1:
Spacers are introduced as intermediary structures between the mandrels and the final fin structures. These spacers act as etching stoppers that physically define the maximum etching depth and lateral boundaries. By using spacers as intermediaries, the etching process can proceed with relaxed time control since the spacer material provides a clear visual and physical endpoint, preventing over-etching even when fin dimensions are miniaturized
Solution Approach 2:
The method changes the critical parameters from lithography-defined dimensions to etching-process-defined dimensions. The fin width and pitch are not solely determined by lithography patterns but are precisely controlled by the etching process parameters (etchant selection, etching time, temperature) in conjunction with the spacer geometry. This parameter change allows better control at miniaturized dimensions where lithography resolution becomes limiting
3Reliability
If dummy fin structures are added adjacent to fin structures, then contact area and electrical connection are improved, but the device structure becomes more complex
Solution Approach 1:
The dummy fin structures are merged with the main fin structures through a unified fabrication process. Both fin structures and dummy fin structures are formed simultaneously using the same mandrel-spacer-etching sequence, just at different locations on the substrate. This merging approach allows the dummy fins to provide additional contact area and electrical connection pathways without requiring separate fabrication steps, thus improving reliability while minimizing the increase in structural complexity
Data Source
AI summary
A semiconductor device includes: a substrate, a fin-shaped structure on the substrate, and a dummy fin-shaped structure on the substrate and adjacent to the fin-shaped structure. Preferably, the fin-shaped structure includes a gate structure thereon and a first epitaxial layer adjacent to two sides of the gate structure, and the dummy fin-shaped structure includes a second epitaxial layer thereon. A contact plug is disposed on the first epitaxial layer and the second epitaxial layer. In addition, the dummy fin-shaped structure includes a curve, in which the curve is omega shaped.