Fin FET Multiple Lattice Constant Layers for Leakage Current
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Solution Overview
Problem
As fin field effect transistors become more highly integrated due to reduced device size, it becomes difficult to improve the current driving ability, which is hindered by the floating body effect and low heat conduction in silicon-on-insulator substrates, and conventional single-gate transistors face issues with short channel effects and leakage current.
Innovation Solution
The use of a fin FET structure with multiple lattice constant layers, where different epi layers are applied to various surfaces of the fin, including the top surface and sidewalls, to enhance carrier mobility and stress distribution, thereby improving current driving ability and suppressing short channel effects.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the device size is reduced for high integration, then integration density is improved, but current driving ability deteriorates
Solution Approach 1:
The patent applies different lattice constant materials specifically to the fin structure and channel region where they are most needed for carrier mobility enhancement, rather than uniformly across the entire device. This localized application of SiGe or SiC materials to the fin and channel areas improves current driving ability in the critical transport region while maintaining overall device miniaturization for high integration.
2Ease of manufacture
If SOI substrate is used to enable MOS transistor fabrication, then manufacturing capability is improved, but heat conduction deteriorates
Solution Approach 1:
The patent employs a composite structure combining SOI substrate with SiGe or SiC materials having different lattice constants. The SOI portion provides the necessary manufacturing capabilities and electrical isolation, while the SiGe/SiC fin and channel regions provide superior thermal conduction properties and enhanced carrier mobility, creating a composite material system that balances both manufacturing ease and thermal performance.
3Reliability
If fin FET structure with multiple lattice constant layers is implemented, then carrier mobility is improved, but device complexity increases
Solution Approach 1:
The patent segments the fin FET structure into distinct regions with different lattice constant materials - specifically applying SiGe or SiC layers to the fin and channel regions while maintaining other regions in standard materials. This segmentation allows carrier mobility enhancement precisely where needed for device operation, while limiting the complex multi-material structure to only the critical transport regions, thereby managing overall device complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The implementation of multiple lattice constant layers in the fin FET structure enhances carrier mobility and current levels, effectively addressing the challenges of current driving ability and short channel effects, while also improving the on-off characteristics and reducing leakage current.
Implementation Method 1
At least two different lattice constant layers may be located on respective different axially oriented surfaces of the fin, wherein the at least two different lattice constant layers each have lattice constants that are different than the first lattice constant and each other
Data Source
AI summary
A Field Effect Transistor (FET) structure may include a fin on a substrate having a first lattice constant and at least two different lattice constant layers on respective different axially oriented surfaces of the fin, wherein the at least two different lattice constant layers each comprise lattice constants that are different than the first lattice constant and each other.