Fin Field Effect Transistor Uniform Width Control
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Solution Overview
Problem
Existing fin field effect transistors face challenges in achieving uniform fin widths, leading to variations in threshold voltages and deteriorated electric characteristics due to non-uniform trench widths during the etching process.
Innovation Solution
The design involves forming fin portions with substantially the same width, using a method that includes forming sacrificial patterns and spacer mask patterns to ensure uniform etching, and employing a device isolation layer to expose upper portions of the fin portions, thereby maintaining consistent fin widths and reducing threshold voltage distribution.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Manufacturing precision
If conventional etching processes are used to form fin structures, then manufacturing simplicity is maintained, but non-uniform trench widths result in varied fin widths and deteriorated electric characteristics
Solution Approach 1:
The patent introduces sacrificial patterns and spacer mask patterns as intermediary elements that mediate between the conventional etching process and the desired uniform fin structures. These intermediaries enable precise width control by serving as physical references during the etching process, thereby achieving uniform fin widths without requiring complex direct etching control
Solution Approach 2:
The patent performs preliminary actions by forming sacrificial patterns and spacer mask patterns before the actual fin etching process. These preliminary structures are created with precise dimensions that serve as templates, ensuring that the subsequent etching process produces uniform fin widths. The preliminary patterns are removed after serving their guiding function, leaving the desired uniform fin structures
2Reliability
If non-uniform trench widths are formed during etching, then manufacturing simplicity is maintained, but threshold voltage distribution increases and electric characteristics deteriorate
Solution Approach 1:
The spacer mask patterns act as intermediaries that transfer the uniform width from the sacrificial patterns to the final fin structures. By using these intermediary patterns as etching masks, the process ensures uniform trench widths and consequently uniform fin widths, which directly controls threshold voltage uniformity across all fins in the device
Solution Approach 2:
The patent changes the physical parameters of the etching process by using the spacer mask patterns as dimensional references. The spacer thickness and pattern dimensions are carefully controlled parameters that determine the final fin width. By adjusting and controlling these parameters during the preliminary patterning stage, uniform fin widths and consistent threshold voltages are achieved
Data Source
AI summary
Field effect transistors including a source region and a drain region on a substrate, a fin base protruding from a top surface of the substrate, a plurality of fin portions extending upward from the fin base and connecting the source region with the drain region, a gate electrode on the fin portions, and a gate dielectric between the fin portions and the gate electrode may be provided. A top surface of the substrate may include a plurality of grooves (e.g., a plurality of convex portions and a plurality of concave portions). Further, a device isolation layer may be provided to expose upper portions of the plurality of fin portions and to cover top surfaces of the plurality of grooves.