Fin-Type IC Structure With Selective Epitaxy for Leakage Control

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Solution Overview

Problem

The down-scaling of integrated circuit devices leads to short channel effects, deteriorating their reliability, and existing multi-gate structures face challenges in process complexity and electrical short-circuits, particularly in devices with varying semiconductor pattern thicknesses.

Innovation Solution

The integrated circuit device incorporates a fin-type active region with semiconductor patterns of varying widths and thicknesses, employing a thick epitaxial thin film below narrow patterns to mitigate current leakage and improve electrical reliability, using a method that includes forming sacrificial layers and gate lines with selective epitaxial growth.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If multi-gate structures are used to mitigate short channel effects, then reliability is improved, but device complexity increases

Engineering Contradiction:
Improveelectrical reliabilityVSAvoidprocess complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies local quality by implementing different lower thin film thicknesses in different regions of the device. Specifically, a first lower thin film with a first thickness is formed below the first source/drain region, and a second lower thin film with a second thickness is formed below the second source/drain region. This localized variation in film thickness allows targeted control of current leakage paths without requiring complex multi-gate structures throughout the entire device, thereby improving electrical reliability while managing process complexity.

Inventive Principle:
Principle #3Local quality

2Productivity

If down-scaling is pursued to increase integration, then productivity is improved, but short channel effects worsen reliability

Engineering Contradiction:
Improveintegration densityVSAvoidelectrical reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent applies preliminary action by forming the lower thin films below the source/drain regions before forming the gate line and semiconductor patterns. This preliminary formation of the lower thin films allows the current leakage paths to be controlled in advance, enabling the device to maintain high integration density through down-scaling while preventing short channel effects from deteriorating electrical reliability.

Inventive Principle:
Principle #10Preliminary action

3Adaptability or versatility

If semiconductor patterns of varying widths are used, then adaptability is improved, but manufacturing precision requirements increase

Engineering Contradiction:
Improvedesign flexibilityVSAvoidpattern width control
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies parameter changes by varying the thickness parameter of the lower thin films in response to different semiconductor pattern widths. Specifically, the first lower thin film has a first thickness and the second lower thin film has a second thickness, where the thickness values are adjusted according to the width of the underlying semiconductor patterns. This parameter adjustment allows the device to accommodate varying pattern widths and maintain electrical reliability without requiring excessively tight manufacturing precision controls on the pattern widths themselves.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This approach enhances the electrical reliability of integrated circuit devices by reducing current leakage and minimizing process complexity, particularly in devices with narrow semiconductor patterns, thereby improving overall device quality.

Implementation Method 1

forming a lower thin film on the fin-type active region and below the first source/drain region

Methodology Applied
Scientific EffectEpitaxial growth: Epitaxy

Data Source

PatentUS20260059848A1Integrated circuit device
Publication Date: 2026.02.26 SAMSUNG ELECTRONICS CO LTD
  • US20260059848A1 patent drawing
  • US20260059848A1 patent drawing
  • US20260059848A1 patent drawing

AI summary

Provided is an integrated circuit device including a plurality of semiconductor patterns having different widths. In order to minimize or reduce current leakage from a semiconductor pattern having a relatively small width to below a source/drain region, a lower thin film having a certain thickness may be selectively formed below the source/drain region corresponding to the narrow semiconductor pattern, thereby improving electrical reliability of the device. Also, provided is an integrated circuit device including a plurality of semiconductor patterns having different widths. In order to minimize or reduce current leakage from a semiconductor pattern having a relatively small width to below a source/drain region, a lower thin film may be selectively and thickly deposited below the source/drain region corresponding to the narrow semiconductor pattern, thereby improving electrical reliability of the device.