Semiconductor Fin Isolation Structure Preventing Epitaxial Bridging

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Solution Overview

Problem

In advanced semiconductor technology, the shrinking sizes of semiconductor devices lead to increased risk of epitaxial bridging between closely spaced fin segments and poor landing of source/drain contact plugs due to facet defects, necessitating an improved isolation structure that can prevent these issues while achieving a smaller layout area.

Innovation Solution

A semiconductor structure with a trench having a rounded top corner and concave upper sidewall, filled with a first dielectric layer and covered by a second dielectric layer with a bird's peak profile, along with a gate body that completely covers the trench and includes spacers on its sidewalls, preventing epitaxial bridging and improving contact plug yield.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If the trench width is reduced to achieve smaller layout area, then the layout area is reduced, but the risk of epitaxial bridging between adjacent fin segments increases

Engineering Contradiction:
Improvelayout areaVSAvoidepitaxial bridging risk
Core Design Contradiction:
Area of stationary objectVSReliability

Solution Approach 1:

The patent applies curvature by forming rounded top corners in the trench structure. This rounded geometry prevents sharp corners where epitaxial material could bridge between adjacent fin segments, while still maintaining a compact trench width for small layout area. The curved profile eliminates the geometric discontinuity that would otherwise promote unwanted epitaxial growth connections.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Solution Approach 2:

The patent implements local quality by creating a non-uniform trench profile with concave upper sidewalls and rounded top corners, rather than a simple rectangular shape. This localized geometric modification at critical regions (top corners and upper sidewalls) provides enhanced isolation against epitaxial bridging precisely where it is most likely to occur, while the overall trench remains narrow for area efficiency.

Inventive Principle:
Principle #3Local quality

2Manufacturing precision

If multiple-patterning processes are used to form finer fin structures, then the fin structure uniformity is improved, but the process complexity increases

Engineering Contradiction:
Improvefin structure uniformityVSAvoidpatterning process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent applies preliminary action by pre-forming the isolation structure with rounded top corners and concave sidewalls before the epitaxial growth process. This preliminary geometric preparation ensures that when epitaxial material is later deposited, the growth is naturally constrained by the pre-established curved isolation profile, preventing bridging without requiring additional patterning steps during the epitaxial process.

Inventive Principle:
Principle #10Preliminary action

3Area of stationary object

If the fin segments are placed closer together to reduce layout area, then the area is reduced, but facet defects increase resulting in poor contact plug landing

Engineering Contradiction:
Improvelayout areaVSAvoidcontact plug landing quality
Core Design Contradiction:
Area of stationary objectVSManufacturing precision

Solution Approach 1:

The rounded top corners of the trench isolation structure eliminate sharp geometric features that cause facet defects during epitaxial growth. By providing a smooth curved transition at the trench corners, the patent prevents the formation of defective crystal facets that would otherwise interfere with contact plug formation, ensuring high-quality contact plug landing even when fin segments are closely spaced.

Inventive Principle:
Principle #14Spheroidality (Curvature)

Data Source

PatentUS10658458B2Semiconductor structure and method of forming the same
Publication Date: 2020.05.19 UNITED MICROELECTRONICS CORP
  • US10658458B2 patent drawing
  • US10658458B2 patent drawing
  • US10658458B2 patent drawing

AI summary

A method of forming a semiconductor structure is disclosed. A fin structure is formed on a substrate and a trench is formed in the fin structure. The trench has a top corner, an upper portion having an upper sidewall and a lower portion having a lower sidewall. A first dielectric layer is then formed on the substrate and fills the lower portion of the trench. After that, a second dielectric layer is formed on the substrate and covers the top corner and the upper sidewall of the trench. The second dielectric layer also covers an upper surface of the first dielectric layer.